sys/arch/pmax/ibus/ibus_pmax.c

77

{ "dc", SYS_DEV_OPT0, KV(KN230_SYS_DZ1), 0 },

sys/arch/pmax/pmax/dec_3max.c

214

{ SYS_DEV_OPT0, KN02_IP_SLOT0 },

sys/arch/pmax/pmax/dec_3max.c

299

CALLINTR(SYS_DEV_OPT0);

sys/arch/pmax/pmax/dec_3maxplus.c

243

case SYS_DEV_OPT0:

sys/arch/pmax/pmax/dec_3maxplus.c

308

CHECKINTR(SYS_DEV_OPT0, KN03_INTR_TC_0);

sys/arch/pmax/pmax/dec_3min.c

243

case SYS_DEV_OPT0:

sys/arch/pmax/pmax/dec_3min.c

292

case SYS_DEV_OPT0:

sys/arch/pmax/pmax/dec_3min.c

414

if ((ipending & MIPS_INT_MASK_0) && intrtab[SYS_DEV_OPT0].ih_func) {

sys/arch/pmax/pmax/dec_3min.c

415

(*intrtab[SYS_DEV_OPT0].ih_func)(intrtab[SYS_DEV_OPT0].ih_arg);

sys/arch/pmax/pmax/dec_3min.c

416

intrtab[SYS_DEV_OPT0].ih_count.ev_count++;

sys/arch/pmax/pmax/dec_5100.c

185

CALLINTR(SYS_DEV_OPT0, KN230_CSR_INTR_OPT0);

sys/arch/pmax/pmax/dec_maxine.c

236

case SYS_DEV_OPT0:

sys/arch/pmax/pmax/dec_maxine.c

306

CHECKINTR(SYS_DEV_OPT0, XINE_INTR_TC_0);

sys/arch/pmax/tc/ioasic.c

75

{ "(TC0)", 0x0, C(SYS_DEV_OPT0), },

sys/arch/pmax/tc/ioasic.c

90

{ "(TC0)", 0x0, C(SYS_DEV_OPT0), },

sys/arch/pmax/tc/tc_3max.c

51

{ KV(KN02_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */

sys/arch/pmax/tc/tc_3maxplus.c

51

{ KV(KN03_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */

sys/arch/pmax/tc/tc_3min.c

51

{ KV(KMIN_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */

sys/arch/pmax/tc/tc_maxine.c

53

{ KV(XINE_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */