sys/arch/arm/sunxi/sun4i_a10_ccu.c

319

SUNXI_CCU_PHASE(A10_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

321

SUNXI_CCU_PHASE(A10_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

330

SUNXI_CCU_PHASE(A10_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

332

SUNXI_CCU_PHASE(A10_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

341

SUNXI_CCU_PHASE(A10_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

343

SUNXI_CCU_PHASE(A10_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

352

SUNXI_CCU_PHASE(A10_CLK_MMC3_SAMPLE, "mmc3_sample", "mmc3",

sys/arch/arm/sunxi/sun4i_a10_ccu.c

354

SUNXI_CCU_PHASE(A10_CLK_MMC3_OUTPUT, "mmc3_output", "mmc3",

sys/arch/arm/sunxi/sun8i_h3_ccu.c

359

SUNXI_CCU_PHASE(H3_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",

sys/arch/arm/sunxi/sun8i_h3_ccu.c

361

SUNXI_CCU_PHASE(H3_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",

sys/arch/arm/sunxi/sun8i_h3_ccu.c

366

SUNXI_CCU_PHASE(H3_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",

sys/arch/arm/sunxi/sun8i_h3_ccu.c

368

SUNXI_CCU_PHASE(H3_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",

sys/arch/arm/sunxi/sun8i_h3_ccu.c

373

SUNXI_CCU_PHASE(H3_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",

sys/arch/arm/sunxi/sun8i_h3_ccu.c

375

SUNXI_CCU_PHASE(H3_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

286

SUNXI_CCU_PHASE(V3S_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

288

SUNXI_CCU_PHASE(V3S_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

293

SUNXI_CCU_PHASE(V3S_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

295

SUNXI_CCU_PHASE(V3S_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

300

SUNXI_CCU_PHASE(V3S_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

302

SUNXI_CCU_PHASE(V3S_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",

sys/arch/arm/sunxi/sun9i_a80_ccu.c

281

SUNXI_CCU_PHASE(A80_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",

sys/arch/arm/sunxi/sun9i_a80_ccu.c

283

SUNXI_CCU_PHASE(A80_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",

sys/arch/arm/sunxi/sun9i_a80_ccu.c

292

SUNXI_CCU_PHASE(A80_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",

sys/arch/arm/sunxi/sun9i_a80_ccu.c

294

SUNXI_CCU_PHASE(A80_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",

sys/arch/arm/sunxi/sun9i_a80_ccu.c

303

SUNXI_CCU_PHASE(A80_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",

sys/arch/arm/sunxi/sun9i_a80_ccu.c

305

SUNXI_CCU_PHASE(A80_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",

sys/arch/arm/sunxi/sunxi_ccu.c

359

case SUNXI_CCU_PHASE: type = "phase"; break;

sys/arch/arm/sunxi/sunxi_ccu.h

328

.type = SUNXI_CCU_PHASE, \

sys/arch/arm/sunxi/sunxi_ccu_phase.c

123

KASSERT(clk->type == SUNXI_CCU_PHASE);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

66

KASSERT(clk->type == SUNXI_CCU_PHASE);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

92

KASSERT(clk->type == SUNXI_CCU_PHASE);