STD_OUT
[29] = {"CHIDOUT", STD_OUT},
[26] = {"DGRINT", STD_OUT},
[25] = {"BC32K", STD_OUT},
[24] = {"TXD", STD_OUT},
[22] = {"CS1", STD_OUT},
[21] = {"CS2", STD_OUT},
[20] = {"CS3", STD_OUT},
[19] = {"MCS0", STD_OUT},
[18] = {"MCS1", STD_OUT},
[17] = {"MCS2", STD_OUT},
[16] = {"MCS3", STD_OUT},
[15] = {"SPICLK", STD_OUT},
[14] = {"SPIOUT", STD_OUT},
[11] = {"CARDREG", STD_OUT},
[10] = {"CARDIOWR", STD_OUT},
[9] = {"CARDIORD", STD_OUT},
[8] = {"CARD1CSL", STD_OUT},
[7] = {"CARD1CSH", STD_OUT},
[6] = {"CARD2CSL", STD_OUT},
[5] = {"CARD2CSH", STD_OUT},
[2] = {"CARDDIR", STD_OUT},
[29] = {"CHIDOUT", STD_OUT},
[26] = {"DGRINT", STD_OUT},
[25] = {"BC32K", STD_OUT},
[24] = {"TXD", STD_OUT},
[22] = {"CS1", STD_OUT},
[21] = {"CS2", STD_OUT},
[20] = {"CS3", STD_OUT},
[19] = {"MCS0", STD_OUT},
[18] = {"MCS1", STD_OUT},
[17] = {"RXPWR", STD_OUT},
[16] = {"IROUT", STD_OUT},
[15] = {"SPICLK", STD_OUT},
[14] = {"SPIOUT", STD_OUT},
[11] = {"CARDREG", STD_OUT},
[10] = {"CARDIOWR", STD_OUT},
[9] = {"CARDIORD", STD_OUT},
[8] = {"CARD1CSL", STD_OUT},
[7] = {"CARD1CSH", STD_OUT},
[6] = {"CARD2CSL", STD_OUT},
[5] = {"CARD2CSH", STD_OUT},
[2] = {"CARDDIR", STD_OUT},