SR_RX_RDY
if ((sr & SR_RX_RDY) == 0) \
if (sc->sc_iskgdb && (sr & SR_RX_RDY)) {
while ((ch_base[CH_SR] & SR_RX_RDY) == 0)
while ((vxtregs[CH_SR] & SR_RX_RDY) == 0)
if ((vxtregs[CH_SR] & SR_RX_RDY) == 0)
if ((stat[0] & SR_RX_RDY) == 0) {
if ((stat[1] & SR_RX_RDY) == 0)