SRMMU_TEINVALID
case SRMMU_TEINVALID:
cpuinfo.ctx_tbl[0] = SRMMU_TEINVALID;
case SRMMU_TEINVALID:
case SRMMU_TEINVALID:
case SRMMU_TEINVALID:
setpgt4m(&cpi->ctx_tbl[ctx], SRMMU_TEINVALID);
if (pm->pm_reg_ptps[n][vr] != SRMMU_TEINVALID)
setpgt4m(upt++, SRMMU_TEINVALID);
setpgt4m(&rp->rg_seg_ptps[vs], SRMMU_TEINVALID);
setpgt4m(&pm->pm_reg_ptps[n][vr], SRMMU_TEINVALID);
SRMMU_TEINVALID, 1, 0, CPUSET_ALL);
setpgt4m_va(va, &pte0[VA_SUN4M_VPG(va)], SRMMU_TEINVALID,
setpgt4m_va(va, &sp->sg_pte[VA_SUN4M_VPG(va)], SRMMU_TEINVALID,
SRMMU_TEINVALID, pm->pm_ctx != NULL,
setpgt4m(&ptd[i], SRMMU_TEINVALID);
setpgt4m(&pte[i], SRMMU_TEINVALID);
SRMMU_TEINVALID, pm->pm_ctx != NULL,
SRMMU_TEINVALID, 1, 0, CPUSET_ALL);
setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
setpgt4m(cpuinfo.vpage_pte[1], SRMMU_TEINVALID);
setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
setpgt4m(cpuinfo.vpage_pte[1], SRMMU_TEINVALID);
if ((te & SRMMU_TETYPE) == SRMMU_TEINVALID)
((te & SRMMU_TETYPE) == SRMMU_TEINVALID ?