SRAB_BASE
#ifdef SRAB_BASE
while (bus_space_read_4(bst, bsh, SRAB_BASE + SRAB_CMDSTAT) & SRA_GORDYN) {
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_CMDSTAT,
rv = bus_space_read_4(bst, bsh, SRAB_BASE + SRAB_RDL);
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_CMDSTAT,
rv = bus_space_read_4(bst, bsh, SRAB_BASE + SRAB_RDH);
rv |= bus_space_read_4(bst, bsh, SRAB_BASE + SRAB_RDL);
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_WDL, val);
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_CMDSTAT,
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_WDL, val);
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_WDH, val >> 32);
bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_CMDSTAT,
#ifdef SRAB_BASE
{ "bcmsw", SRAB_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, },