SH3_CCR_CE
able[(r & SH3_CCR_CE ? 1 : 0)]));
_reg_write_4(SH3_CCR, SH3_CCR_CE);
_reg_write_4(SH3_CCR, SH3_CCR_CE);
_reg_write_4(SH3_CCR, SH3_CCR_CF | SH3_CCR_CE); /* cache clear */
_reg_write_4(SH3_CCR, SH3_CCR_CE);
sh_cache_enable_unified = (r & SH3_CCR_CE);
_reg_read_4(SH3_CCR) & ~SH3_CCR_CE);
_reg_bset_4(SH3_CCR, SH3_CCR_CE);