SET_SBIC_syn
SET_SBIC_syn(regs,
SET_SBIC_syn(regs,
SET_SBIC_syn(regs,
SET_SBIC_syn(regs, SBIC_SYN (0, sbic_min_period));
SET_SBIC_syn(regs, 0); /* asynch for now */
SET_SBIC_syn(regs, SBIC_SYN (dev->sc_sync[target].offset,
SET_SBIC_syn(regs, SBIC_SYN (0, sbic_min_period));
SET_SBIC_syn(regs,
SET_SBIC_syn(regs,
SET_SBIC_syn(regs, SBIC_SYN (dev->sc_sync[newtarget].offset,
SET_SBIC_syn(regs, SBIC_SYN (0, sbic_min_period));
SET_SBIC_syn(regs, 0); /* asynch for now */
SET_SBIC_syn(regs, SBIC_SYN (dev->sc_sync[target].offset,
SET_SBIC_syn(regs, SBIC_SYN (0, sbic_min_period));
SET_SBIC_syn(regs, SBIC_SYN(dev->sc_sync[target].offset,
SET_SBIC_syn(regs, SBIC_SYN(0, sbic_min_period));
SET_SBIC_syn(regs,
SET_SBIC_syn(regs,
SET_SBIC_syn(regs,
SET_SBIC_syn(regs, SBIC_SYN (0, sbic_min_period));
SET_SBIC_syn(regs, 0);
SET_SBIC_syn(sc, 0);
SET_SBIC_syn(sc, syncreg);
SET_SBIC_syn(sc, 0);
SET_SBIC_syn(sc, syncreg);