SDHC_TRANSFER_COMPLETE
!sdhc_wait_intr(hp, SDHC_TRANSFER_COMPLETE, hz * 10, false)) {
SDHC_TRANSFER_COMPLETE, SDHC_DMA_TIMEOUT, false)) {
KASSERT(HREAD2(hp, SDHC_NINTR_STATUS_EN) & SDHC_TRANSFER_COMPLETE);
KASSERT(HREAD2(hp, SDHC_NINTR_SIGNAL_EN) & SDHC_TRANSFER_COMPLETE);
SDHC_DMA_INTERRUPT|SDHC_TRANSFER_COMPLETE,
if (status & SDHC_TRANSFER_COMPLETE) {
KASSERT(HREAD2(hp, SDHC_NINTR_STATUS_EN) & SDHC_TRANSFER_COMPLETE);
KASSERT(HREAD2(hp, SDHC_NINTR_SIGNAL_EN) & SDHC_TRANSFER_COMPLETE);
if (error == 0 && !sdhc_wait_intr(hp, SDHC_TRANSFER_COMPLETE,
while (datalen > 3 && !ISSET(status, SDHC_TRANSFER_COMPLETE)) {
if (datalen > 0 && !ISSET(status, SDHC_TRANSFER_COMPLETE)) {
while (datalen > 3 && !ISSET(status, SDHC_TRANSFER_COMPLETE)) {
if (datalen > 0 && !ISSET(status, SDHC_TRANSFER_COMPLETE)) {
if (ISSET(status, SDHC_TRANSFER_COMPLETE))
(xstatus & SDHC_TRANSFER_COMPLETE) &&
SDHC_TRANSFER_COMPLETE|SDHC_DMA_INTERRUPT)) {
SDHC_TRANSFER_COMPLETE | SDHC_COMMAND_COMPLETE;