sys/arch/arm/broadcom/bcm2835_intr.c

122

#define BCM2835_INT_TIMER0 (BCM2835_INT_GPU0BASE + 0)

sys/arch/arm/broadcom/bcm2835_intr.c

123

#define BCM2835_INT_TIMER1 (BCM2835_INT_GPU0BASE + 1)

sys/arch/arm/broadcom/bcm2835_intr.c

124

#define BCM2835_INT_TIMER2 (BCM2835_INT_GPU0BASE + 2)

sys/arch/arm/broadcom/bcm2835_intr.c

125

#define BCM2835_INT_TIMER3 (BCM2835_INT_GPU0BASE + 3)

sys/arch/arm/broadcom/bcm2835_intr.c

126

#define BCM2835_INT_USB (BCM2835_INT_GPU0BASE + 9)

sys/arch/arm/broadcom/bcm2835_intr.c

127

#define BCM2835_INT_DMA0 (BCM2835_INT_GPU0BASE + 16)

sys/arch/arm/broadcom/bcm2835_intr.c

128

#define BCM2835_INT_DMA2 (BCM2835_INT_GPU0BASE + 18)

sys/arch/arm/broadcom/bcm2835_intr.c

129

#define BCM2835_INT_DMA3 (BCM2835_INT_GPU0BASE + 19)

sys/arch/arm/broadcom/bcm2835_intr.c

130

#define BCM2835_INT_AUX (BCM2835_INT_GPU0BASE + 29)

sys/arch/arm/broadcom/bcm2835_intr.c

131

#define BCM2835_INT_ARM (BCM2835_INT_GPU0BASE + 30)

sys/arch/arm/broadcom/bcm2835_intr.c

487

BCM2835_INT_GPU0BASE - BCM2835_INT_BASE, pending1);

sys/arch/arm/broadcom/bcm2835_intr.c

533

base = BCM2835_INT_GPU0BASE;