sys/arch/mips/sibyte/dev/sbmac.c

1145

SBMAC_WRITECSR(sc->sbm_macenable, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1151

SBMAC_WRITECSR(sc->sbm_rxfilter, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1183

SBMAC_WRITECSR(port, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1193

SBMAC_WRITECSR(port, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1203

SBMAC_WRITECSR(port, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1209

SBMAC_WRITECSR(port, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1221

SBMAC_WRITECSR(port, reg);

sys/arch/mips/sibyte/dev/sbmac.c

1223

SBMAC_WRITECSR(port, 0); // pass1 workaround

sys/arch/mips/sibyte/dev/sbmac.c

1230

SBMAC_WRITECSR(sc->sbm_rxfilter, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1231

SBMAC_WRITECSR(sc->sbm_imr, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1232

SBMAC_WRITECSR(sc->sbm_framecfg, framecfg);

sys/arch/mips/sibyte/dev/sbmac.c

1233

SBMAC_WRITECSR(sc->sbm_fifocfg, fifo);

sys/arch/mips/sibyte/dev/sbmac.c

1234

SBMAC_WRITECSR(sc->sbm_maccfg, cfg);

sys/arch/mips/sibyte/dev/sbmac.c

1260

SBMAC_WRITECSR(sc->sbm_macenable, M_MAC_RXDMA_EN0 | M_MAC_TXDMA_EN0 |

sys/arch/mips/sibyte/dev/sbmac.c

1267

SBMAC_WRITECSR(sc->sbm_imr,

sys/arch/mips/sibyte/dev/sbmac.c

1275

SBMAC_WRITECSR(sc->sbm_rxfilter, M_MAC_UCAST_EN | M_MAC_BCAST_EN);

sys/arch/mips/sibyte/dev/sbmac.c

1287

SBMAC_WRITECSR(txdma->sbdma_config0, dma_cfg0);

sys/arch/mips/sibyte/dev/sbmac.c

1292

SBMAC_WRITECSR(sc->sbm_fifocfg, fifo_cfg);

sys/arch/mips/sibyte/dev/sbmac.c

1346

SBMAC_WRITECSR(sc->sbm_rxfilter, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1347

SBMAC_WRITECSR(sc->sbm_imr, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1357

SBMAC_WRITECSR(sc->sbm_macenable, ctl);

sys/arch/mips/sibyte/dev/sbmac.c

1434

SBMAC_WRITECSR(sc->sbm_rxfilter, reg);

sys/arch/mips/sibyte/dev/sbmac.c

1438

SBMAC_WRITECSR(sc->sbm_rxfilter, reg);

sys/arch/mips/sibyte/dev/sbmac.c

1586

SBMAC_WRITECSR(sc->sbm_framecfg, framecfg);

sys/arch/mips/sibyte/dev/sbmac.c

1587

SBMAC_WRITECSR(sc->sbm_maccfg, cfg);

sys/arch/mips/sibyte/dev/sbmac.c

1693

SBMAC_WRITECSR(sc->sbm_maccfg, cfg);

sys/arch/mips/sibyte/dev/sbmac.c

1846

SBMAC_WRITECSR(port, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1852

SBMAC_WRITECSR(port, 0);

sys/arch/mips/sibyte/dev/sbmac.c

1861

SBMAC_WRITECSR(sc->sbm_rxfilter, reg);

sys/arch/mips/sibyte/dev/sbmac.c

1870

SBMAC_WRITECSR(sc->sbm_rxfilter, reg);

sys/arch/mips/sibyte/dev/sbmac.c

1892

SBMAC_WRITECSR(port, reg);

sys/arch/mips/sibyte/dev/sbmac.c

1906

SBMAC_WRITECSR(sc->sbm_rxfilter, reg);

sys/arch/mips/sibyte/dev/sbmac.c

296

SBMAC_WRITECSR(reg, (val &

sys/arch/mips/sibyte/dev/sbmac.c

447

SBMAC_WRITECSR(d->sbdma_config1, 0);

sys/arch/mips/sibyte/dev/sbmac.c

449

SBMAC_WRITECSR(d->sbdma_dscrbase, d->sbdma_dscrtable_phys);

sys/arch/mips/sibyte/dev/sbmac.c

451

SBMAC_WRITECSR(d->sbdma_config0, V_DMA_RINGSZ(d->sbdma_maxdescr) | 0);

sys/arch/mips/sibyte/dev/sbmac.c

553

SBMAC_WRITECSR(d->sbdma_dscrcnt, 1);

sys/arch/mips/sibyte/dev/sbmac.c

787

SBMAC_WRITECSR(d->sbdma_dscrcnt, num_mbufs);