SBIC_ASR_DBR
while ((asr & SBIC_ASR_DBR) == 0) {
while ((asr & SBIC_ASR_DBR) == 0) {
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Wants us to write */
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Wants us to write */
(SBIC_ASR_DBR | SBIC_ASR_INT)))
if (asr & SBIC_ASR_DBR)
if (asr & SBIC_ASR_DBR) {
while (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR)
SBIC_WAIT(regs, SBIC_ASR_DBR, 0); \
SBIC_WAIT(regs, SBIC_ASR_DBR, 0); \
while ((asr & SBIC_ASR_DBR) == 0) {
while ((asr & SBIC_ASR_DBR) == 0) {
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Wants us to write */
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Wants us to write */
!(asr & SBIC_ASR_DBR|SBIC_ASR_INT))
if (asr & SBIC_ASR_DBR)
if (asr & SBIC_ASR_DBR) {
while (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Not the read direction, then */
SBIC_WAIT(regs, SBIC_ASR_DBR, 0); \
SBIC_WAIT(regs, SBIC_ASR_DBR, 0); \
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR)
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Wants us to write */
if (asr & SBIC_ASR_DBR) {
while (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR)
SBIC_WAIT(regs, SBIC_ASR_DBR, 0); \
SBIC_WAIT(regs, SBIC_ASR_DBR, 0); \
if ((asr & SBIC_ASR_DBR) != 0) {
if ((asr & SBIC_ASR_DBR) != 0) {
while ((asr & SBIC_ASR_DBR) != 0) {
if ((asr & SBIC_ASR_DBR) != 0)
SBIC_WAIT(sc, SBIC_ASR_DBR, 0); \
SBIC_WAIT(sc, SBIC_ASR_DBR, 0); \
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) {
while (asr & SBIC_ASR_DBR) {
if (asr & SBIC_ASR_DBR) /* Not the read direction */
SBIC_WAIT(sc, SBIC_ASR_DBR, 0); \
SBIC_WAIT(sc, SBIC_ASR_DBR, 0); \