sys/dev/pci/cs4280.c

1244

mem = BA0READ4(sc, CS4280_CLKCR1) | CLKCR1_SWCE;

sys/dev/pci/cs4280.c

1263

while ((BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY) == 0) {

sys/dev/pci/cs4280.c

1276

while ((BA0READ4(sc, CS428X_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=

sys/dev/pci/cs4280.c

1359

mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;

sys/dev/pci/cs4280.c

1361

DPRINTF(("midi reset: 0x%x\n", BA0READ4(sc, CS4280_MIDCR)));

sys/dev/pci/cs4280.c

1385

mem = BA0READ4(sc, CS4280_CLKCR1);

sys/dev/pci/cs4280.c

1394

while (BA0READ4(sc, CS4280_SERBST) & SERBST_WBSY) {

sys/dev/pci/cs4280.c

1423

mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;

sys/dev/pci/cs4280.c

1427

if (mem != BA0READ4(sc, CS4280_MIDCR)) {

sys/dev/pci/cs4280.c

1428

DPRINTF(("midi_open: MIDCR=%d\n", BA0READ4(sc, CS4280_MIDCR)));

sys/dev/pci/cs4280.c

1431

DPRINTF(("MIDCR=0x%x\n", BA0READ4(sc, CS4280_MIDCR)));

sys/dev/pci/cs4280.c

1446

mem = BA0READ4(sc, CS4280_MIDCR);

sys/dev/pci/cs4280.c

1463

if ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0) {

sys/dev/pci/cs4280.c

1464

mem = BA0READ4(sc, CS4280_MIDWP) & ~MIDWP_MASK;

sys/dev/pci/cs4280.c

1469

if (mem != BA0READ4(sc, CS4280_MIDWP)) {

sys/dev/pci/cs4280.c

1471

mem, BA0READ4(sc, CS4280_MIDWP)));

sys/dev/pci/cs4280.c

417

intr = BA0READ4(sc, CS4280_HISR);

sys/dev/pci/cs4280.c

484

BA0READ4(sc, CS4280_MIDSR)));

sys/dev/pci/cs4280.c

487

((BA0READ4(sc, CS4280_MIDSR) & MIDSR_RBE) == 0)) {

sys/dev/pci/cs4280.c

488

data = BA0READ4(sc, CS4280_MIDRP) & MIDRP_MASK;

sys/dev/pci/cs4280.c

499

if ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0) {

sys/dev/pci/cs4280.c

506

((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0)) {

sys/dev/pci/cs4280.c

860

while ((BA0READ4(sc, CS428X_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=

sys/dev/pci/cs4281.c

1025

mem = BA0READ4(sc, CS4281_SERMC);

sys/dev/pci/cs4281.c

1046

BA0WRITE4(sc, CS4281_FCR0, (BA0READ4(sc, CS4281_FCR0) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

1067

BA0WRITE4(sc, CS4281_FCR1, (BA0READ4(sc, CS4281_FCR1) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

1090

BA0WRITE4(sc, CS4281_FCR2, (BA0READ4(sc, CS4281_FCR2) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

1091

BA0WRITE4(sc, CS4281_FCR3, (BA0READ4(sc, CS4281_FCR3) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

1142

BA0READ4(sc, CS4281_HIMR) & dat32);

sys/dev/pci/cs4281.c

317

intr = BA0READ4(sc, CS4281_HISR);

sys/dev/pci/cs4281.c

329

hdsr0 = BA0READ4(sc, CS4281_HDSR0); /* clear intr condition */

sys/dev/pci/cs4281.c

331

hdsr1 = BA0READ4(sc, CS4281_HDSR1); /* clear intr condition */

sys/dev/pci/cs4281.c

348

(int)BA0READ4(sc, CS4281_DCA0),

sys/dev/pci/cs4281.c

349

(int)BA0READ4(sc, CS4281_DCC0)));

sys/dev/pci/cs4281.c

369

DPRINTF((" CP DMA 0x%x(%d)", (int)BA0READ4(sc, CS4281_DCA1),

sys/dev/pci/cs4281.c

370

(int)BA0READ4(sc, CS4281_DCC1)));

sys/dev/pci/cs4281.c

420

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);

sys/dev/pci/cs4281.c

431

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);

sys/dev/pci/cs4281.c

468

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);

sys/dev/pci/cs4281.c

507

fmt = BA0READ4(sc, CS4281_DMR0) & ~DMRn_FMTMSK;

sys/dev/pci/cs4281.c

517

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) & ~DCRn_MSK);

sys/dev/pci/cs4281.c

521

DPRINTF(("HICR =0x%08x(expected 0x00000001)\n", BA0READ4(sc, CS4281_HICR)));

sys/dev/pci/cs4281.c

522

DPRINTF(("HIMR =0x%08x(expected 0x00f0fc3f)\n", BA0READ4(sc, CS4281_HIMR)));

sys/dev/pci/cs4281.c

523

DPRINTF(("DMR0 =0x%08x(expected 0x2???0018)\n", BA0READ4(sc, CS4281_DMR0)));

sys/dev/pci/cs4281.c

524

DPRINTF(("DCR0 =0x%08x(expected 0x00030000)\n", BA0READ4(sc, CS4281_DCR0)));

sys/dev/pci/cs4281.c

525

DPRINTF(("FCR0 =0x%08x(expected 0x81000f00)\n", BA0READ4(sc, CS4281_FCR0)));

sys/dev/pci/cs4281.c

527

BA0READ4(sc, CS4281_DACSR)));

sys/dev/pci/cs4281.c

528

DPRINTF(("SRCSA=0x%08x(expected 0x0b0a0100)\n", BA0READ4(sc, CS4281_SRCSA)));

sys/dev/pci/cs4281.c

530

BA0READ4(sc, CS4281_SSPM) & SSPM_PSRCEN));

sys/dev/pci/cs4281.c

558

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);

sys/dev/pci/cs4281.c

587

fmt = BA0READ4(sc, CS4281_DMR1) & ~DMRn_FMTMSK;

sys/dev/pci/cs4281.c

597

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) & ~DCRn_MSK);

sys/dev/pci/cs4281.c

601

DPRINTF(("HICR=0x%08x\n", BA0READ4(sc, CS4281_HICR)));

sys/dev/pci/cs4281.c

602

DPRINTF(("HIMR=0x%08x\n", BA0READ4(sc, CS4281_HIMR)));

sys/dev/pci/cs4281.c

603

DPRINTF(("DMR1=0x%08x\n", BA0READ4(sc, CS4281_DMR1)));

sys/dev/pci/cs4281.c

604

DPRINTF(("DCR1=0x%08x\n", BA0READ4(sc, CS4281_DCR1)));

sys/dev/pci/cs4281.c

619

sc->sc_suspend_state.cs4281.dcr0 = BA0READ4(sc, CS4281_DCR0);

sys/dev/pci/cs4281.c

620

sc->sc_suspend_state.cs4281.dmr0 = BA0READ4(sc, CS4281_DMR0);

sys/dev/pci/cs4281.c

621

sc->sc_suspend_state.cs4281.dbc0 = BA0READ4(sc, CS4281_DBC0);

sys/dev/pci/cs4281.c

622

sc->sc_suspend_state.cs4281.dba0 = BA0READ4(sc, CS4281_DBA0);

sys/dev/pci/cs4281.c

627

sc->sc_suspend_state.cs4281.dcr1 = BA0READ4(sc, CS4281_DCR1);

sys/dev/pci/cs4281.c

628

sc->sc_suspend_state.cs4281.dmr1 = BA0READ4(sc, CS4281_DMR1);

sys/dev/pci/cs4281.c

629

sc->sc_suspend_state.cs4281.dbc1 = BA0READ4(sc, CS4281_DBC1);

sys/dev/pci/cs4281.c

630

sc->sc_suspend_state.cs4281.dba1 = BA0READ4(sc, CS4281_DBA1);

sys/dev/pci/cs4281.c

633

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);

sys/dev/pci/cs4281.c

634

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);

sys/dev/pci/cs4281.c

714

while ((BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY) == 0) {

sys/dev/pci/cs4281.c

724

while ((BA0READ4(sc, CS4281_ACSTS2) & ACSTS2_CRDY2) == 0) {

sys/dev/pci/cs4281.c

743

dat32 = BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY;

sys/dev/pci/cs4281.c

774

dat32 = BA0READ4(sc, CS428X_ACISV) & (ACISV_ISV3 | ACISV_ISV4) ;

sys/dev/pci/cs4281.c

851

dat32 = BA0READ4(sc, CS4281_EPPMC);

sys/dev/pci/cs4281.c

893

while ((BA0READ4(sc, CS4281_CLKCR1) & (CLKCR1_DLLRDY | CLKCR1_CLKON))

sys/dev/pci/cs4281.c

904

while (!(BA0READ4(sc, CS4281_CLKCR1) & CLKCR1_DLLRDY)) {

sys/dev/pci/cs4281.c

919

while ((BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY) == 0) {

sys/dev/pci/cs4281.c

931

while ((BA0READ4(sc, CS4281_ACSTS2) & ACSTS2_CRDY2) == 0) {

sys/dev/pci/cs4281.c

954

dat32 = BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY;

sys/dev/pci/cs4281.c

985

dat32 = BA0READ4(sc, CS428X_ACISV) & (ACISV_ISV3 | ACISV_ISV4);

sys/dev/pci/cs428x.c

200

BA0READ4(sc, CS428X_ACSDA);

sys/dev/pci/cs428x.c

219

while ((BA0READ4(sc, CS428X_ACSTS) & ACSTS_VSTS) == 0) {

sys/dev/pci/cs428x.c

227

*ac97_data = BA0READ4(sc, CS428X_ACSDA);

sys/dev/pci/cs428x.c

321

while ((BA0READ4(sc, CS428X_ACCTL) & ACCTL_DCV)) {

sys/dev/pci/cs428x.c

325

BA0READ4(sc, CS428X_ACCTL));