sys/arch/evbmips/rmixl/machdep.c

1045

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_GPIO + RMIXL_GPIO_RESET, r);

sys/arch/mips/rmi/rmixl_fmn.c

538

RMIXL_IOREG_WRITE(regoff, 0);

sys/arch/mips/rmi/rmixl_intr.c

105

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PIC + (off), (val))

sys/arch/mips/rmi/rmixl_obio.c

242

RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_DEVICE_MASK, r);

sys/arch/mips/rmi/rmixl_obio.c

256

RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR0_EN, r);

sys/arch/mips/rmi/rmixl_obio.c

261

RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR0_UPG, r);

sys/arch/mips/rmi/rmixl_obio.c

268

RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR1_CLEAR, r);

sys/arch/mips/rmi/rmixl_obio.c

277

RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_BITERR_INT_EN, r);

sys/arch/mips/rmi/rmixl_pcie.c

1227

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + offset, r);

sys/arch/mips/rmi/rmixl_pcie.c

1306

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + offset, r);

sys/arch/mips/rmi/rmixl_pcie.c

233

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_BRIDGE + \

sys/arch/mips/rmi/rmixl_pcie.c

558

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + int_enb_offset[link].r0,

sys/arch/mips/rmi/rmixl_pcie.c

560

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + int_enb_offset[link].r1,

sys/arch/mips/rmi/rmixl_pcie.c

562

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + msi_enb_offset[link], 0);

sys/arch/mips/rmi/rmixl_pcie.c

652

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_BE +

sys/arch/mips/rmi/rmixl_pcie.c

654

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_BE +

sys/arch/mips/rmi/rmixl_pcix.c

211

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_BRIDGE + \