RK3588_PMU2_IOC_REG
{ RK3588_PMU2_IOC_REG + 0x0014, __BITS(11,8) },
{ RK3588_PMU2_IOC_REG + 0x0014, __BITS(15,12) },
{ RK3588_PMU2_IOC_REG + 0x0018, __BITS(3,0) },
{ RK3588_PMU2_IOC_REG + 0x0018, __BITS(7,4) },
{ RK3588_PMU2_IOC_REG + 0x0018, __BITS(11,8) },
{ RK3588_PMU2_IOC_REG + 0x0018, __BITS(15,12) },
{ RK3588_PMU2_IOC_REG + 0x001c, __BITS(3,0) },
{ RK3588_PMU2_IOC_REG + 0x001c, __BITS(7,4) },
{ RK3588_PMU2_IOC_REG + 0x001c, __BITS(11,8) },
{ RK3588_PMU2_IOC_REG + 0x001c, __BITS(15,12) },
{ RK3588_PMU2_IOC_REG + 0x0020, __BITS(3,0) },
{ RK3588_PMU2_IOC_REG + 0x0020, __BITS(7,4) },
{ RK3588_PMU2_IOC_REG + 0x0020, __BITS(11,8) },
{ RK3588_PMU2_IOC_REG + 0x0020, __BITS(15,12) },
{ RK3588_PMU2_IOC_REG + 0x0024, __BITS(3,0) },
{ RK3588_PMU2_IOC_REG + 0x0024, __BITS(7,4) },
{ RK3588_PMU2_IOC_REG + 0x0024, __BITS(11,8) },
{ RK3588_PMU2_IOC_REG + 0x0024, __BITS(15,12) },
{ RK3588_PMU2_IOC_REG + 0x0028, __BITS(11,10) },
{ RK3588_PMU2_IOC_REG + 0x0028, __BITS(13,12) },
{ RK3588_PMU2_IOC_REG + 0x0028, __BITS(15,14) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(1,0) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(3,2) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(5,4) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(7,6) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(9,8) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(11,10) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(13,12) },
{ RK3588_PMU2_IOC_REG + 0x002c, __BITS(15,14) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(1,0) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(3,2) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(5,4) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(7,6) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(9,8) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(11,10) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(13,12) },
{ RK3588_PMU2_IOC_REG + 0x0030, __BITS(15,14) },
{ RK3588_PMU2_IOC_REG + 0x0040, __BIT(5) },
{ RK3588_PMU2_IOC_REG + 0x0040, __BIT(6) },
{ RK3588_PMU2_IOC_REG + 0x0040, __BIT(7) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(0) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(1) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(2) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(3) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(4) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(5) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(6) },
{ RK3588_PMU2_IOC_REG + 0x0044, __BIT(7) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(0) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(1) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(2) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(3) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(4) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(5) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(6) },
{ RK3588_PMU2_IOC_REG + 0x0048, __BIT(7) },
{ RK3588_BUS_IOC_REG + 0x000c, __BITS(3,0), RK3588_PMU2_IOC_REG + 0x0000 },
{ RK3588_BUS_IOC_REG + 0x000c, __BITS(7,4), RK3588_PMU2_IOC_REG + 0x0000 },
{ RK3588_BUS_IOC_REG + 0x000c, __BITS(11,8), RK3588_PMU2_IOC_REG + 0x0000 },
{ RK3588_BUS_IOC_REG + 0x000c, __BITS(15,12), RK3588_PMU2_IOC_REG + 0x0000 },
{ RK3588_BUS_IOC_REG + 0x0010, __BITS(3,0), RK3588_PMU2_IOC_REG + 0x0004 },
{ RK3588_BUS_IOC_REG + 0x0010, __BITS(7,4), RK3588_PMU2_IOC_REG + 0x0004 },
{ RK3588_BUS_IOC_REG + 0x0010, __BITS(11,8), RK3588_PMU2_IOC_REG + 0x0004 },
{ RK3588_BUS_IOC_REG + 0x0010, __BITS(15,12), RK3588_PMU2_IOC_REG + 0x0004 },
{ RK3588_BUS_IOC_REG + 0x0014, __BITS(3,0), RK3588_PMU2_IOC_REG + 0x0008 },
{ RK3588_BUS_IOC_REG + 0x0014, __BITS(7,4), RK3588_PMU2_IOC_REG + 0x0008 },
{ RK3588_BUS_IOC_REG + 0x0014, __BITS(11,8), RK3588_PMU2_IOC_REG + 0x0008 },
{ RK3588_BUS_IOC_REG + 0x0014, __BITS(15,12), RK3588_PMU2_IOC_REG + 0x0008 },
{ RK3588_BUS_IOC_REG + 0x0018, __BITS(3,0), RK3588_PMU2_IOC_REG + 0x000c },
{ RK3588_BUS_IOC_REG + 0x0018, __BITS(7,4), RK3588_PMU2_IOC_REG + 0x000c },
{ RK3588_BUS_IOC_REG + 0x0018, __BITS(11,8), RK3588_PMU2_IOC_REG + 0x000c },
{ RK3588_BUS_IOC_REG + 0x0018, __BITS(15,12), RK3588_PMU2_IOC_REG + 0x000c },
{ RK3588_BUS_IOC_REG + 0x001c, __BITS(3,0), RK3588_PMU2_IOC_REG + 0x0010 },
{ RK3588_BUS_IOC_REG + 0x001c, __BITS(7,4), RK3588_PMU2_IOC_REG + 0x0010 },
{ RK3588_BUS_IOC_REG + 0x001c, __BITS(11,8), RK3588_PMU2_IOC_REG + 0x0010 },
{ RK3588_BUS_IOC_REG + 0x001c, __BITS(15,12), RK3588_PMU2_IOC_REG + 0x0010 },
{ RK3588_PMU2_IOC_REG + 0x0014, __BITS(3,0) },
{ RK3588_PMU2_IOC_REG + 0x0014, __BITS(7,4) },