sys/arch/dreamcast/dev/microcode/aica_arm.c

101

REG_WRITE_4(0x2800, 0x000f); /* Master volume: Max */

sys/arch/dreamcast/dev/microcode/aica_arm.c

190

REG_WRITE_4(0x28b4, 0x0020); /* INT Enable to SH4 */

sys/arch/dreamcast/dev/microcode/aica_arm.c

218

REG_WRITE_4(0x28b8, 0x0020);

sys/arch/dreamcast/dev/microcode/aica_arm.c

225

REG_WRITE_4(0x28b8, 0x0020);

sys/arch/dreamcast/dev/microcode/aica_arm.c

250

REG_WRITE_4(0x28b4, 0x0020); /* INT Enable to SH4 */

sys/arch/dreamcast/dev/microcode/aica_arm.c

350

REG_WRITE_4(0x2800, L256TO16(aicacmd->l_param));

sys/arch/dreamcast/dev/microcode/aica_arm.c

55

#define CH_WRITE_4(ch,off,val) REG_WRITE_4(((ch) << 7) + (off), val)

sys/arch/dreamcast/dev/microcode/aica_arm.c

72

REG_WRITE_4(0x2800, 0x0000); /* Master volume: Min */