REG_RD - NetBSD

sys/arch/arm/imx/imx23_platform.c

132

start = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);

sys/arch/arm/imx/imx23_platform.c

135

now = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);

sys/dev/pci/if_bnx.c

1072

val = REG_RD(sc, BNX_CTX_CTX_CTRL);

sys/dev/pci/if_bnx.c

1117

data = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1121

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1134

data = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1138

data = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1150

data = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1159

data = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1163

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1201

val1 = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1205

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1218

val1 = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1232

val1 = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1236

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1261

val = REG_RD(sc, BNX_EMAC_MODE);

sys/dev/pci/if_bnx.c

1367

val = REG_RD(sc, BNX_NVM_SW_ARB);

sys/dev/pci/if_bnx.c

1404

val = REG_RD(sc, BNX_NVM_SW_ARB);

sys/dev/pci/if_bnx.c

1435

val = REG_RD(sc, BNX_MISC_CFG);

sys/dev/pci/if_bnx.c

1448

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1478

val = REG_RD(sc, BNX_MISC_CFG);

sys/dev/pci/if_bnx.c

1499

val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);

sys/dev/pci/if_bnx.c

1520

val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);

sys/dev/pci/if_bnx.c

1567

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1621

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1623

val = REG_RD(sc, BNX_NVM_READ);

sys/dev/pci/if_bnx.c

1684

if (REG_RD(sc, BNX_NVM_COMMAND) & BNX_NVM_COMMAND_DONE)

sys/dev/pci/if_bnx.c

1721

val = REG_RD(sc, BNX_NVM_CFG1);

sys/dev/pci/if_bnx.c

2186

uint32_t val = REG_RD(sc, BNX_MISC_DUAL_MEDIA_CTRL);

sys/dev/pci/if_bnx.c

3355

val = REG_RD(sc, BNX_CTX_COMMAND);

sys/dev/pci/if_bnx.c

3378

val = REG_RD(sc, BNX_CTX_HOST_PAGE_TBL_CTRL);

sys/dev/pci/if_bnx.c

3501

REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);

sys/dev/pci/if_bnx.c

3544

val = REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);

sys/dev/pci/if_bnx.c

3548

val = REG_RD(sc, BNX_MISC_NEW_CORE_CTL);

sys/dev/pci/if_bnx.c

3551

REG_RD(sc, BNX_MISC_NEW_CORE_CTL); /* barrier */

sys/dev/pci/if_bnx.c

3555

val = REG_RD(sc, BNX_PCICFG_DEVICE_CONTROL);

sys/dev/pci/if_bnx.c

3574

val = REG_RD(sc, BNX_MISC_ID);

sys/dev/pci/if_bnx.c

3579

REG_RD(sc, BNX_MISC_COMMAND);

sys/dev/pci/if_bnx.c

3595

val = REG_RD(sc, BNX_PCICFG_MISC_CONFIG);

sys/dev/pci/if_bnx.c

3614

val = REG_RD(sc, BNX_PCI_SWAP_DIAG0);

sys/dev/pci/if_bnx.c

3698

val = REG_RD(sc, BNX_RPM_MGMT_PKT_CTRL) |

sys/dev/pci/if_bnx.c

3710

val = REG_RD(sc, BNX_MQ_CONFIG);

sys/dev/pci/if_bnx.c

3731

val = REG_RD(sc, BNX_TBDR_CONFIG);

sys/dev/pci/if_bnx.c

3830

val = REG_RD(sc, BNX_MISC_NEW_CORE_CTL);

sys/dev/pci/if_bnx.c

3840

val = REG_RD(sc, BNX_RPM_MGMT_PKT_CTRL) &

sys/dev/pci/if_bnx.c

3852

REG_RD(sc, BNX_MISC_ENABLE_SET_BITS);

sys/dev/pci/if_bnx.c

4291

val = REG_RD(sc, BNX_MQ_MAP_L2_5);

sys/dev/pci/if_bnx.c

4956

REG_RD(sc, BNX_PCICFG_INT_ACK_CMD);

sys/dev/pci/if_bnx.c

4976

val = REG_RD(sc, BNX_HC_COMMAND);

sys/dev/pci/if_bnx.c

5089

REG_RD(sc, BNX_MISC_ENABLE_SET_BITS);

sys/dev/pci/if_bnx.c

5451

if (REG_RD(sc, BNX_EMAC_TX_STATUS) & BNX_EMAC_TX_STATUS_XOFFED)

sys/dev/pci/if_bnx.c

5502

!ISSET(REG_RD(sc, BNX_PCICFG_MISC_STATUS),

sys/dev/pci/if_bnx.c

651

sc->bnx_chipid = REG_RD(sc, BNX_MISC_ID);

sys/dev/pci/if_bnx.c

6613

val1 = REG_RD(sc, BNX_MISC_ENABLE_STATUS_BITS);

sys/dev/pci/if_bnx.c

6617

val1 = REG_RD(sc, BNX_DMA_STATUS);

sys/dev/pci/if_bnx.c

6620

val1 = REG_RD(sc, BNX_CTX_STATUS);

sys/dev/pci/if_bnx.c

6623

val1 = REG_RD(sc, BNX_EMAC_STATUS);

sys/dev/pci/if_bnx.c

6627

val1 = REG_RD(sc, BNX_RPM_STATUS);

sys/dev/pci/if_bnx.c

6630

val1 = REG_RD(sc, BNX_TBDR_STATUS);

sys/dev/pci/if_bnx.c

6634

val1 = REG_RD(sc, BNX_TDMA_STATUS);

sys/dev/pci/if_bnx.c

6638

val1 = REG_RD(sc, BNX_HC_STATUS);

sys/dev/pci/if_bnx.c

6653

i, REG_RD(sc, i), REG_RD(sc, i + 0x4),

sys/dev/pci/if_bnx.c

6654

REG_RD(sc, i + 0x8), REG_RD(sc, i + 0xC));

sys/dev/pci/if_bnx.c

732

val = REG_RD(sc, BNX_PCICFG_MISC_STATUS);

sys/dev/pci/if_bnx.c

738

clkreg = REG_RD(sc, BNX_PCICFG_PCI_CLOCK_CONTROL_BITS);

sys/dev/pci/if_bnxvar.h

91

#define BNX_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))

sys/dev/pci/if_bnxvar.h

92

#define BNX_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))