REG7
{ "pwm_vs_0", REG7, 31, { GPIOX_10 }, 1 },
{ "pwm_vs_1", REG7, 30, { GPIOX_11 }, 1 },
{ "pwm_vs_2", REG7, 28, { GPIODV_9 }, 1 },
{ "pwm_vs_3", REG7, 27, { GPIODV_28 }, 1 },
{ "pwm_vs_4", REG7, 26, { GPIODV_29 }, 1 },
{ "xtal24_out", REG7, 25, { GPIODV_29 }, 1 },
{ "eth_txd1_0", REG7, 21, { GPIOH_5 }, 1 },
{ "eth_txd0_0", REG7, 20, { GPIOH_6 }, 1 },
{ "sdxc_clk_c", REG7, 19, { BOOT_8 }, 1 },
{ "sdxc_cmd_c", REG7, 18, { BOOT_10 }, 1 },
{ "eth_rxd3", REG7, 22, { DIF_2_P }, 1 },
{ "eth_rxd2", REG7, 23, { DIF_2_N }, 1 },
{ "i2c_sck_a", REG7, 27, { GPIODV_25 }, 1 },
{ "i2c_sda_a", REG7, 26, { GPIODV_24 }, 1 },
{ "i2c_sck_b", REG7, 25, { GPIODV_27 }, 1 },
{ "i2c_sda_b", REG7, 24, { GPIODV_26 }, 1 },
{ "i2c_sck_c", REG7, 23, { GPIODV_29 }, 1 },
{ "i2c_sda_c", REG7, 22, { GPIODV_28 }, 1 },
{ "emmc_nand_d07", REG7, 31, { BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7 }, 8 },
{ "emmc_clk", REG7, 30, { BOOT_8 }, 1 },
{ "emmc_cmd", REG7, 29, { BOOT_10 }, 1 },
{ "emmc_ds", REG7, 28, { BOOT_15 }, 1 },
{ "nor_d", REG7, 13, { BOOT_11 }, 1 },
{ "nor_q", REG7, 12, { BOOT_12 }, 1 },
{ "nor_c", REG7, 11, { BOOT_13 }, 1 },
{ "nor_cs", REG7, 10, { BOOT_15 }, 1 },
{ "nand_ce0", REG7, 7, { BOOT_8 }, 1 },
{ "nand_ce1", REG7, 6, { BOOT_9 }, 1 },
{ "nand_rb0", REG7, 5, { BOOT_10 }, 1 },
{ "nand_ale", REG7, 4, { BOOT_11 }, 1 },
{ "nand_cle", REG7, 3, { BOOT_12 }, 1 },
{ "nand_wen_clk", REG7, 2, { BOOT_13 }, 1 },
{ "nand_ren_wr", REG7, 1, { BOOT_14 }, 1 },
{ "nand_dqs", REG7, 0, { BOOT_15 }, 1 },