sys/arch/amd64/include/frame.h

86

#define tf(reg, REG, idx) uint64_t tf_##reg;

sys/arch/amd64/include/frame_regs.h

67

#define _FRAME_NOREG(reg, REG, idx)

sys/arch/amd64/include/mcontext.h

42

#define GREG_OFFSETS(reg, REG, idx) _REG_##REG = idx,

sys/arch/arm/amlogic/meson8b_pinctrl.c

491

{ "uart_tx_ao_a", REG, 12, { GPIOAO_0 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

492

{ "uart_rx_ao_a", REG, 11, { GPIOAO_1 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

493

{ "uart_cts_ao_a", REG, 10, { GPIOAO_2 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

494

{ "uart_rts_ao_a", REG, 9, { GPIOAO_3 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

495

{ "i2c_mst_sck_ao", REG, 6, { GPIOAO_4 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

496

{ "i2c_mst_sda_ao", REG, 5, { GPIOAO_5 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

497

{ "clk_32k_in_out", REG, 18, { GPIOAO_6 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

498

{ "remote_input", REG, 0, { GPIOAO_7 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

499

{ "hdmi_cec_1", REG, 17, { GPIOAO_12 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

500

{ "ir_blaster", REG, 31, { GPIOAO_13 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

501

{ "pwm_c2", REG, 22, { GPIOAO_3 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

502

{ "i2c_sck_ao", REG, 2, { GPIOAO_4 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

503

{ "i2c_sda_ao", REG, 1, { GPIOAO_5 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

504

{ "ir_remote_out", REG, 21, { GPIOAO_7 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

505

{ "i2s_am_clk_out", REG, 30, { GPIOAO_8 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

506

{ "i2s_ao_clk_out", REG, 29, { GPIOAO_9 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

507

{ "i2s_lr_clk_out", REG, 28, { GPIOAO_10 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

508

{ "i2s_out_01", REG, 27, { GPIOAO_11 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

509

{ "uart_tx_ao_b0", REG, 26, { GPIOAO_0 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

510

{ "uart_rx_ao_b0", REG, 25, { GPIOAO_1 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

511

{ "uart_cts_ao_b", REG, 8, { GPIOAO_2 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

512

{ "uart_rts_ao_b", REG, 7, { GPIOAO_3 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

513

{ "uart_tx_ao_b1", REG, 24, { GPIOAO_4 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

514

{ "uart_rx_ao_b1", REG, 23, { GPIOAO_5 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

515

{ "spdif_out_1", REG, 16, { GPIOAO_6 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

516

{ "i2s_in_ch01", REG, 13, { GPIOAO_6 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

517

{ "i2s_ao_clk_in", REG, 15, { GPIOAO_9 }, 1 },

sys/arch/arm/amlogic/meson8b_pinctrl.c

518

{ "i2s_lr_clk_in", REG, 14, { GPIOAO_10 }, 1 },

sys/arch/luna68k/stand/boot/sio.c

107

int rr0 = sioreg(REG(unit, RR0), 0);

sys/arch/luna68k/stand/boot/sio.c

108

int rr1 = sioreg(REG(unit, RR1), 0);

sys/arch/luna68k/stand/boot/sio.c

116

sioreg(REG(unit, WR0), WR0_ERRRST);

sys/arch/luna68k/stand/boot/sio.c

191

while ((sioreg(REG(unit, RR0), 0) & RR0_TXEMPTY) == 0)

sys/arch/luna68k/stand/boot/sio.c

197

while ((sioreg(REG(unit, RR0), 0) & RR0_TXEMPTY) == 0)

sys/arch/luna68k/stand/boot/sio.c

216

sioreg(REG(0, WR0), WR0_CHANRST);

sys/arch/luna68k/stand/boot/sio.c

224

sioreg(REG(0, WR0), WR0_RSTINT);

sys/arch/luna68k/stand/boot/sio.c

226

sioreg(REG(0, WR4), WR4_BAUD96 | WR4_STOP1 | WR4_NPARITY);

sys/arch/luna68k/stand/boot/sio.c

228

sioreg(REG(0, WR3), WR3_RX8BIT | WR3_RXENBL);

sys/arch/luna68k/stand/boot/sio.c

230

sioreg(REG(0, WR5), WR5_TX8BIT | WR5_TXENBL | WR5_DTR | WR5_RTS);

sys/arch/luna68k/stand/boot/sio.c

232

sioreg(REG(0, WR0), WR0_RSTINT);

sys/arch/luna68k/stand/boot/sio.c

234

sioreg(REG(0, WR1), WR1_RXALLS);

sys/arch/luna68k/stand/boot/sio.c

237

sioreg(REG(1, WR0), WR0_CHANRST);

sys/arch/luna68k/stand/boot/sio.c

240

sioreg(REG(1, WR0), WR0_RSTINT);

sys/arch/luna68k/stand/boot/sio.c

242

sioreg(REG(1, WR4), WR4_BAUD96 | WR4_STOP1 | WR4_NPARITY);

sys/arch/luna68k/stand/boot/sio.c

244

sioreg(REG(1, WR3), WR3_RX8BIT | WR3_RXENBL);

sys/arch/luna68k/stand/boot/sio.c

246

sioreg(REG(1, WR5), WR5_TX8BIT | WR5_TXENBL);

sys/arch/luna68k/stand/boot/sio.c

248

sioreg(REG(1, WR0), WR0_RSTINT);

sys/arch/luna68k/stand/boot/sio.c

250

sioreg(REG(1, WR1), WR1_RXALLS);

sys/arch/sh3/sh3/devreg.c

103

SH ## x ## REG(TRA); \

sys/arch/sh3/sh3/devreg.c

104

SH ## x ## REG(EXPEVT); \

sys/arch/sh3/sh3/devreg.c

105

SH ## x ## REG(INTEVT); \

sys/arch/sh3/sh3/devreg.c

107

SH ## x ## REG(BARA); \

sys/arch/sh3/sh3/devreg.c

108

SH ## x ## REG(BAMRA); \

sys/arch/sh3/sh3/devreg.c

109

SH ## x ## REG(BASRA); \

sys/arch/sh3/sh3/devreg.c

110

SH ## x ## REG(BBRA); \

sys/arch/sh3/sh3/devreg.c

111

SH ## x ## REG(BARB); \

sys/arch/sh3/sh3/devreg.c

112

SH ## x ## REG(BAMRB); \

sys/arch/sh3/sh3/devreg.c

113

SH ## x ## REG(BASRB); \

sys/arch/sh3/sh3/devreg.c

114

SH ## x ## REG(BBRB); \

sys/arch/sh3/sh3/devreg.c

115

SH ## x ## REG(BDRB); \

sys/arch/sh3/sh3/devreg.c

116

SH ## x ## REG(BDMRB); \

sys/arch/sh3/sh3/devreg.c

117

SH ## x ## REG(BRCR); \

sys/arch/sh3/sh3/devreg.c

119

SH ## x ## REG(PTEH); \

sys/arch/sh3/sh3/devreg.c

120

SH ## x ## REG(TEA); \

sys/arch/sh3/sh3/devreg.c

121

SH ## x ## REG(TTB); \

sys/arch/sh3/sh3/devreg.c

123

SH ## x ## REG(R64CNT); \

sys/arch/sh3/sh3/devreg.c

124

SH ## x ## REG(RSECCNT); \

sys/arch/sh3/sh3/devreg.c

125

SH ## x ## REG(RMINCNT); \

sys/arch/sh3/sh3/devreg.c

126

SH ## x ## REG(RHRCNT); \

sys/arch/sh3/sh3/devreg.c

127

SH ## x ## REG(RWKCNT); \

sys/arch/sh3/sh3/devreg.c

128

SH ## x ## REG(RDAYCNT); \

sys/arch/sh3/sh3/devreg.c

129

SH ## x ## REG(RMONCNT); \

sys/arch/sh3/sh3/devreg.c

130

SH ## x ## REG(RYRCNT); \

sys/arch/sh3/sh3/devreg.c

131

SH ## x ## REG(RSECAR); \

sys/arch/sh3/sh3/devreg.c

132

SH ## x ## REG(RMINAR); \

sys/arch/sh3/sh3/devreg.c

133

SH ## x ## REG(RHRAR); \

sys/arch/sh3/sh3/devreg.c

134

SH ## x ## REG(RWKAR); \

sys/arch/sh3/sh3/devreg.c

135

SH ## x ## REG(RDAYAR); \

sys/arch/sh3/sh3/devreg.c

136

SH ## x ## REG(RMONAR); \

sys/arch/sh3/sh3/devreg.c

137

SH ## x ## REG(RCR1); \

sys/arch/sh3/sh3/devreg.c

138

SH ## x ## REG(RCR2); \

sys/arch/sh3/sh3/devreg.c

140

SH ## x ## REG(TOCR); \

sys/arch/sh3/sh3/devreg.c

141

SH ## x ## REG(TSTR); \

sys/arch/sh3/sh3/devreg.c

142

SH ## x ## REG(TCOR0); \

sys/arch/sh3/sh3/devreg.c

143

SH ## x ## REG(TCNT0); \

sys/arch/sh3/sh3/devreg.c

144

SH ## x ## REG(TCR0); \

sys/arch/sh3/sh3/devreg.c

145

SH ## x ## REG(TCOR1); \

sys/arch/sh3/sh3/devreg.c

146

SH ## x ## REG(TCNT1); \

sys/arch/sh3/sh3/devreg.c

147

SH ## x ## REG(TCR1); \

sys/arch/sh3/sh3/devreg.c

148

SH ## x ## REG(TCOR2); \

sys/arch/sh3/sh3/devreg.c

149

SH ## x ## REG(TCNT2); \

sys/arch/sh3/sh3/devreg.c

150

SH ## x ## REG(TCR2); \

sys/arch/sh3/sh3/devreg.c

151

SH ## x ## REG(TCPR2); \

sys/arch/vax/vsa/dz_vsbus.c

78

REG(csr); /* 00 Csr: control/status register */

sys/arch/vax/vsa/dz_vsbus.c

79

REG(rbuf); /* 04 Rbuf/Lpr: receive buffer/line param reg. */

sys/arch/vax/vsa/dz_vsbus.c

80

REG(tcr); /* 08 Tcr: transmit console register */

sys/arch/vax/vsa/dz_vsbus.c

81

REG(tdr); /* 0C Msr/Tdr: modem status reg/transmit data reg */

sys/arch/vax/vsa/dz_vsbus.c

82

REG(lpr0); /* 10 Lpr0: */

sys/arch/vax/vsa/dz_vsbus.c

83

REG(lpr1); /* 14 Lpr0: */

sys/arch/vax/vsa/dz_vsbus.c

84

REG(lpr2); /* 18 Lpr0: */

sys/arch/vax/vsa/dz_vsbus.c

85

REG(lpr3); /* 1C Lpr0: */

sys/dev/tc/sfbplus.c

611

REG(vdac, bt_reg) = 0x40; /* CMD0 */ tc_wmb();

sys/dev/tc/sfbplus.c

612

REG(vdac, bt_reg) = 0x0; /* CMD1 */ tc_wmb();

sys/dev/tc/sfbplus.c

613

REG(vdac, bt_reg) = 0xc0; /* CMD2 */ tc_wmb();

sys/dev/tc/sfbplus.c

614

REG(vdac, bt_reg) = 0xff; /* PRM */ tc_wmb();

sys/dev/tc/sfbplus.c

615

REG(vdac, bt_reg) = 0; /* 205 */ tc_wmb();

sys/dev/tc/sfbplus.c

616

REG(vdac, bt_reg) = 0x0; /* PBM */ tc_wmb();

sys/dev/tc/sfbplus.c

617

REG(vdac, bt_reg) = 0; /* 207 */ tc_wmb();

sys/dev/tc/sfbplus.c

618

REG(vdac, bt_reg) = 0x0; /* ORM */ tc_wmb();

sys/dev/tc/sfbplus.c

619

REG(vdac, bt_reg) = 0x0; /* OBM */ tc_wmb();

sys/dev/tc/sfbplus.c

620

REG(vdac, bt_reg) = 0x0; /* ILV */ tc_wmb();

sys/dev/tc/sfbplus.c

621

REG(vdac, bt_reg) = 0x0; /* TEST */ tc_wmb();

sys/dev/tc/sfbplus.c

624

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

625

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

626

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

627

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

628

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

629

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

630

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

631

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

632

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

633

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

634

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

635

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

636

REG(vdac, bt_reg) = 0x0; tc_wmb();

sys/dev/tc/sfbplus.c

642

REG(vdac, bt_cmap) = p[0]; tc_wmb();

sys/dev/tc/sfbplus.c

643

REG(vdac, bt_cmap) = p[1]; tc_wmb();

sys/dev/tc/sfbplus.c

644

REG(vdac, bt_cmap) = p[2]; tc_wmb();

sys/dev/tc/sfbplus.c

650

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

658

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

659

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

660

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

662

REG(vdac, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

663

REG(vdac, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

664

REG(vdac, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

666

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

667

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

668

REG(vdac, bt_reg) = 0xff; tc_wmb();

sys/dev/tc/sfbplus.c

677

REG(vdac, bt_reg) = 0x40; tc_wmb(); /* CMD 0 */

sys/dev/tc/sfbplus.c

678

REG(vdac, bt_reg) = 0x48; tc_wmb(); /* CMD 1 */

sys/dev/tc/sfbplus.c

679

REG(vdac, bt_reg) = 0xc0; tc_wmb(); /* CMD 2 */

sys/dev/tc/sfbplus.c

680

REG(vdac, bt_reg) = 0; tc_wmb(); /* !? 204 !? */

sys/dev/tc/sfbplus.c

681

REG(vdac, bt_reg) = 0xff; tc_wmb(); /* plane 0:7 */

sys/dev/tc/sfbplus.c

682

REG(vdac, bt_reg) = 0xff; tc_wmb(); /* plane 8:15 */

sys/dev/tc/sfbplus.c

683

REG(vdac, bt_reg) = 0xff; tc_wmb(); /* plane 16:23 */

sys/dev/tc/sfbplus.c

684

REG(vdac, bt_reg) = 0xff; tc_wmb(); /* plane 24:27 */

sys/dev/tc/sfbplus.c

685

REG(vdac, bt_reg) = 0x00; tc_wmb(); /* blink 0:7 */

sys/dev/tc/sfbplus.c

686

REG(vdac, bt_reg) = 0x00; tc_wmb(); /* blink 8:15 */

sys/dev/tc/sfbplus.c

687

REG(vdac, bt_reg) = 0x00; tc_wmb(); /* blink 16:23 */

sys/dev/tc/sfbplus.c

688

REG(vdac, bt_reg) = 0x00; tc_wmb(); /* blink 24:27 */

sys/dev/tc/sfbplus.c

689

REG(vdac, bt_reg) = 0x00; tc_wmb();

sys/dev/tc/sfbplus.c

693

REG(vdac, bt_reg) = 0x00; /* 0:7 */

sys/dev/tc/sfbplus.c

694

REG(vdac, bt_reg) = 0xe1; /* 8:15 */

sys/dev/tc/sfbplus.c

695

REG(vdac, bt_reg) = 0x81; /* 16:23 */

sys/dev/tc/sfbplus.c

75

REG(vdac, bt_lo) = ((regno) & 0x00ff); \

sys/dev/tc/sfbplus.c

76

REG(vdac, bt_hi) = ((regno) & 0x0f00) >> 8; \

sys/dev/tc/sfbplus.c

838

REG(hw, bt_reg) = (on) ? 0xc0 : 0x00;

sys/dev/tc/sfbplus.c

862

REG(hw, bt_reg) = x; tc_wmb();

sys/dev/tc/sfbplus.c

863

REG(hw, bt_reg) = x >> 8; tc_wmb();

sys/dev/tc/sfbplus.c

864

REG(hw, bt_reg) = y; tc_wmb();

sys/dev/tc/sfbplus.c

865

REG(hw, bt_reg) = y >> 8; tc_wmb();

sys/dev/tc/sfbplus.c

889

REG(hw, bt_reg) = cp[1]; tc_wmb();

sys/dev/tc/sfbplus.c

890

REG(hw, bt_reg) = cp[3]; tc_wmb();

sys/dev/tc/sfbplus.c

891

REG(hw, bt_reg) = cp[5]; tc_wmb();

sys/dev/tc/sfbplus.c

893

REG(hw, bt_reg) = cp[0]; tc_wmb();

sys/dev/tc/sfbplus.c

894

REG(hw, bt_reg) = cp[2]; tc_wmb();

sys/dev/tc/sfbplus.c

895

REG(hw, bt_reg) = cp[4]; tc_wmb();

sys/dev/tc/sfbplus.c

920

REG(hw, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

921

REG(hw, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

928

REG(hw, bt_reg) = shuffle[u]; tc_wmb();

sys/dev/tc/sfbplus.c

930

REG(hw, bt_reg) = shuffle[u]; tc_wmb();

sys/dev/tc/sfbplus.c

936

REG(hw, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

937

REG(hw, bt_reg) = 0; tc_wmb();

sys/dev/tc/sfbplus.c

956

REG(hw, bt_cmap) = cm->r[index]; tc_wmb();

sys/dev/tc/sfbplus.c

957

REG(hw, bt_cmap) = cm->g[index]; tc_wmb();

sys/dev/tc/sfbplus.c

958

REG(hw, bt_cmap) = cm->b[index]; tc_wmb();

sys/dev/tc/stic.c

1167

REG(vdac, bt_reg) = 0x00c0c0c0;

sys/dev/tc/stic.c

1169

REG(vdac, bt_reg) = 0x00000000;

sys/dev/tc/stic.c

1179

REG(vdac, bt_reg) = DUPBYTE0(cp[1]); tc_wmb();

sys/dev/tc/stic.c

1180

REG(vdac, bt_reg) = DUPBYTE0(cp[3]); tc_wmb();

sys/dev/tc/stic.c

1181

REG(vdac, bt_reg) = DUPBYTE0(cp[5]); tc_wmb();

sys/dev/tc/stic.c

1182

REG(vdac, bt_reg) = DUPBYTE0(cp[0]); tc_wmb();

sys/dev/tc/stic.c

1183

REG(vdac, bt_reg) = DUPBYTE0(cp[2]); tc_wmb();

sys/dev/tc/stic.c

1184

REG(vdac, bt_reg) = DUPBYTE0(cp[4]); tc_wmb();

sys/dev/tc/stic.c

119

REG(vdac, bt_lo) = DUPBYTE0(regno); \

sys/dev/tc/stic.c

120

REG(vdac, bt_hi) = DUPBYTE1(regno); \

sys/dev/tc/stic.c

1203

REG(vdac, bt_reg) = DUPBYTE0(shuffle[u]);

sys/dev/tc/stic.c

1206

REG(vdac, bt_reg) = DUPBYTE0(shuffle[u]);

sys/dev/tc/stic.c

1221

REG(vdac, bt_cmap) = DUPBYTE0(cm->r[index]);

sys/dev/tc/stic.c

1223

REG(vdac, bt_cmap) = DUPBYTE0(cm->g[index]);

sys/dev/tc/stic.c

1225

REG(vdac, bt_cmap) = DUPBYTE0(cm->b[index]);

sys/dev/tc/stic.c

1413

REG(vdac, bt_reg) = DUPBYTE0(x); tc_wmb();

sys/dev/tc/stic.c

1414

REG(vdac, bt_reg) = DUPBYTE1(x); tc_wmb();

sys/dev/tc/stic.c

1415

REG(vdac, bt_reg) = DUPBYTE0(y); tc_wmb();

sys/dev/tc/stic.c

1416

REG(vdac, bt_reg) = DUPBYTE1(y); tc_wmb();

sys/dev/tc/stic.c

287

REG(vdac, bt_reg) = 0x00c0c0c0; tc_wmb();

sys/dev/tc/stic.c

296

REG(vdac, bt_reg) = 0x00000000; tc_wmb();

sys/dev/tc/stic.c

297

REG(vdac, bt_reg) = 0x00c2c2c2; tc_wmb();

sys/dev/tc/stic.c

298

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

sys/dev/tc/stic.c

301

REG(vdac, bt_reg) = 0x00000000;

sys/dev/tc/stic.c

307

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

sys/dev/tc/stic.c

308

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

sys/dev/tc/stic.c

309

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

sys/dev/tc/stic.c

310

REG(vdac, bt_reg) = 0x00000000; tc_wmb();

sys/dev/tc/stic.c

311

REG(vdac, bt_reg) = 0x00000000; tc_wmb();

sys/dev/tc/stic.c

312

REG(vdac, bt_reg) = 0x00000000; tc_wmb();

sys/dev/tc/stic.c

313

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

sys/dev/tc/stic.c

314

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

sys/dev/tc/stic.c

315

REG(vdac, bt_reg) = 0x00ffffff; tc_wmb();

usr.bin/xlint/lint1/decl.c

1527

lint_assert(dcs->d_scl == NO_SCL || dcs->d_scl == REG);

usr.bin/xlint/lint1/decl.c

1528

sym->s_register = dcs->d_scl == REG;

usr.bin/xlint/lint1/decl.c

1545

else if (sc == REG) {

usr.bin/xlint/lint1/decl.c

2412

&& (sym->s_scl == AUTO || sym->s_scl == REG)) {

usr.bin/xlint/lint1/decl.c

2755

&& (dsym->s_scl == AUTO || dsym->s_scl == REG)) {

usr.bin/xlint/lint1/decl.c

2965

if (sc != EXTERN && sc != STATIC && sc != AUTO && sc != REG)

usr.bin/xlint/lint1/decl.c

663

if (dcs->d_scl == REG || dcs->d_scl == AUTO) {

usr.bin/xlint/lint1/decl.c

670

if (dcs->d_scl != NO_SCL && dcs->d_scl != REG) {

usr.bin/xlint/lint1/init.c

146

return sym->s_scl == AUTO || sym->s_scl == REG;

usr.bin/xlint/lint1/lex.c

172

kwdef_sclass( "register", REG, 78,0,1),

usr.sbin/gspa/gspa/gsp_act.c

73

o->type = REG;

usr.sbin/gspa/gspa/gsp_inst.c

101

#define OPTREG (OPTOPRN|REG)

usr.sbin/gspa/gspa/gsp_inst.c

123

{"ABS", 0x0380, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

124

{"ADD", 0x4000, ADD, {EXREG, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

125

{"ADDC",0x4200, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

126

{"ADDI",0x0B20, IMMREG, {EXPR, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

127

{"ADDK",0x1000, K32REG, {EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

128

{"ADDXY",0xE000,TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

129

{"AND", 0x5000, AND, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

130

{"ANDI",0x0B80, LIMREGC,{EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

131

{"ANDN",0x5200, OR, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

132

{"ANDNI",0x0B80,LIMREG, {EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

133

{"BTST",0x1C00, BTST, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

137

{"CLR", 0x5600, CLR, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

139

{"CMP", 0x4800, CMP, {EXREG, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

140

{"CMPI",0x0B60, IMMREGC,{EXPR, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

141

{"CMPXY",0xE400,TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

142

{"CPW", 0xE600, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

143

{"CVXYL",0xE800,TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

144

{"DEC", 0x1420, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

146

{"DIVS",0x5800, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

147

{"DIVU",0x5A00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

148

{"DRAV",0xF600, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

149

{"DSJ", 0x0D80, DSJ, {REG, EXPR, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

150

{"DSJEQ",0x0DA0,DSJEQ, {REG, EXPR, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

151

{"DSJNE",0x0DC0,DSJEQ, {REG, EXPR, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

152

{"DSJS",0x3800, DSJS, {REG, EXPR, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

155

{"EXGF",0xD500, EXGF, {REG, OPTSPEC,0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

156

{"EXGPC",0x0120,ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

158

{"GETPC",0x0140,ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

159

{"GETST",0x0180,ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

160

{"INC", 0x1020, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

207

{"LMO", 0x6A00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

208

{"MMFM",0x09A0, MMFM, {REG, OPTXREG,OPTREG, OPTREG}},

usr.sbin/gspa/gspa/gsp_inst.c

209

{"MMTM",0x0980, MMFM, {REG, OPTXREG,OPTREG, OPTREG}},

usr.sbin/gspa/gspa/gsp_inst.c

210

{"MODS",0x6C00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

211

{"MODU",0x6E00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

214

{"MOVI",0x09E0, IMMREG, {EXPR, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

215

{"MOVK",0x1800, K32REG, {EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

216

{"MOVX",0xEC00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

217

{"MOVY",0xEE00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

218

{"MPYS",0x5C00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

219

{"MPYU",0x5E00, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

220

{"NEG", 0x03A0, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

221

{"NEGB",0x03C0, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

223

{"NOT", 0x03E0, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

224

{"OR", 0x5400, OR, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

225

{"ORI", 0x0BA0, LIMREG, {EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

230

{"PUTST",0x01A0,ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

233

{"REV", 0x0020, ONEREG, {REG, 0, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

234

{"RL", 0x3000, KREG, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

237

{"SEXT",0x0500, EXGF, {REG, OPTSPEC,0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

238

{"SLA", 0x2000, KREG, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

239

{"SLL", 0x2400, KREG, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

240

{"SRA", 0x2800, SRA, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

241

{"SRL", 0x2C00, SRA, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

242

{"SUB", 0x4400, SUB, {EXREG, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

243

{"SUBB",0x4600, TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

244

{"SUBI",0x0D00, IMMREGC,{EXPR, REG, OPTSPEC,0}},

usr.sbin/gspa/gspa/gsp_inst.c

245

{"SUBK",0x1400, K32REG, {EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

246

{"SUBXY",0xE200,TWOREG, {REG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

248

{"XOR", 0x5600, OR, {EXREG, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

249

{"XORI",0x0BC0, LIMREG, {EXPR, REG, 0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

250

{"ZEXT",0x0520, EXGF, {REG, OPTSPEC,0, 0}},

usr.sbin/gspa/gspa/gsp_inst.c

433

#define USES_REG(op) ((op)->type == REG \

usr.sbin/gspa/gspa/gsp_inst.c

462

if (class == MOVE && op0 && op1 && op1->type == REG) {

usr.sbin/gspa/gspa/gsp_inst.c

463

if (op0->type == REG) {

usr.sbin/gspa/gspa/gsp_inst.c

474

if( op0->type == REG ){

usr.sbin/gspa/gspa/gsp_inst.c

493

if( op0 && op0->type == REG ){

usr.sbin/gspa/gspa/gsp_inst.c

559

if( op0 && op0->type == REG ){

usr.sbin/gspa/gspa/gsp_inst.c

582

if( op0 && op0->type == REG ){

usr.sbin/gspa/gspa/gsp_inst.c

673

else if( op1->type == REG ){

usr.sbin/gspa/gspa/gsp_inst.c

710

ms = op0 && op0->type == REG? M_REG: op0->mode;

usr.sbin/gspa/gspa/gsp_inst.c

712

md = op1->type == REG? M_REG: op1->mode;

usr.sbin/gspa/gspa/gsp_inst.c

96

#define EXREG (REG|EXPR)

usr.sbin/gspa/gspa/gsp_inst.c

97

#define EAREG (REG|EA)

usr.sbin/gspa/gspa/gsp_inst.c

98

#define EXAREG (REG|EXPR|EA)