R92C_FPGA0_RFIFACESW
reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx));
reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx));
rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg);
saved = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)) & mask;
reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)) & ~mask;
urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg | saved);
reg2 = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(1));
rf_regs[0] = urtwn_read_4(sc, R92C_FPGA0_RFIFACESW(0));
urtwn_write_2(sc, R92C_FPGA0_RFIFACESW(1), R92C_IQK_RFIFACESW1);
urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), reg2);
urtwn_write_4(sc, R92C_FPGA0_RFIFACESW(0), rf_regs[0]);