R4030 - NetBSD

64

#define R4030_SYS_CONFIG (R4030+0x0000) /* Global config register */

65

#define R4030_SYS_TL_BASE (R4030+0x0018) /* DMA transl. table base */

66

#define R4030_SYS_TL_LIMIT (R4030+0x0020) /* DMA transl. table limit */

67

#define R4030_SYS_TL_IVALID (R4030+0x0028) /* DMA transl. cache inval */

68

#define R4030_SYS_DMA0_REGS (R4030+0x0100) /* DMA ch0 base address */

69

#define R4030_SYS_DMA1_REGS (R4030+0x0120) /* DMA ch0 base address */

70

#define R4030_SYS_DMA2_REGS (R4030+0x0140) /* DMA ch0 base address */

71

#define R4030_SYS_DMA3_REGS (R4030+0x0160) /* DMA ch0 base address */

72

#define R4030_SYS_DMA_INT_SRC (R4030+0x0200) /* DMA int source status reg */

73

#define R4030_SYS_NVRAM_PROT (R4030+0x0220) /* NV ram protect register */

74

#define R4030_SYS_IT_VALUE (R4030+0x0228) /* Interval timer reload */

75

#define R4030_SYS_IT_STAT (R4030+0x0230) /* Interval timer count */

76

#define R4030_SYS_ISA_VECTOR (R4030+0x0238) /* ISA Interrupt vector */

77

#define R4030_SYS_EXT_IMASK (R4030+0x00e8) /* External int enable mask */