QE_XMIT_INT
QE_WCSR(QE_CSR_CSR, QE_XMIT_INT | QE_RCV_INT);
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~(QE_RCV_ENABLE|QE_XMIT_INT));
for(j = 0; (j < 0x10000) && ((QE_RCSR(QE_CSR_CSR) & QE_XMIT_INT) == 0); j++)
if ((QE_RCSR(QE_CSR_CSR) & QE_XMIT_INT) == 0) {
#define QE_INTS (QE_RCV_INT | QE_XMIT_INT)
QE_WCSR(QE_CSR_CSR, QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT);
QE_WCSR(QE_CSR_CSR, QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT);
QE_WCSR(QE_CSR_CSR, QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT |
if (csr & (QE_XMIT_INT | QE_XL_INVALID)) {