sys/arch/mips/atheros/ar7100.c

119

PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_IGNORE);

sys/arch/mips/atheros/ar7100.c

120

PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, 0);

sys/arch/mips/atheros/ar7100.c

122

PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, period);

sys/arch/mips/atheros/ar7100.c

123

PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_RESET);

sys/arch/mips/atheros/ar7100.c

146

PUTRESETREG(AR7100_RESET_RESETCTL, ARCHIP_RESETCTL_FULL_CHIP_RESET);

sys/arch/mips/atheros/ar7100.c

196

PUTRESETREG(AR7100_RESET_RESETCTL,

sys/arch/mips/atheros/ar7100.c

202

PUTRESETREG(AR7100_RESET_RESETCTL,

sys/arch/mips/atheros/ar7100.c

210

PUTRESETREG(AR7100_RESET_ENABLE,

sys/arch/mips/atheros/ar9344.c

100

PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_RESET);

sys/arch/mips/atheros/ar9344.c

116

PUTRESETREG(AR9344_RESET_RESETCTL, ARCHIP_RESETCTL_FULL_CHIP_RESET);

sys/arch/mips/atheros/ar9344.c

292

PUTRESETREG(AR9344_RESET_RESETCTL,

sys/arch/mips/atheros/ar9344.c

298

PUTRESETREG(AR9344_RESET_RESETCTL,

sys/arch/mips/atheros/ar9344.c

96

PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_IGNORE);

sys/arch/mips/atheros/ar9344.c

97

PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, 0);

sys/arch/mips/atheros/ar9344.c

99

PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, period);