sys/arch/m68k/include/mmu_40.h

150

#define PTE40_CM_WT __SHIFTIN(0, PTE40_CM)

sys/arch/m68k/include/mmu_40.h

151

#define PTE40_CM_CB __SHIFTIN(1, PTE40_CM)

sys/arch/m68k/include/mmu_40.h

152

#define PTE40_CM_NC_SER __SHIFTIN(2, PTE40_CM)

sys/arch/m68k/include/mmu_40.h

153

#define PTE40_CM_NC __SHIFTIN(3, PTE40_CM)

sys/arch/m68k/include/mmu_40.h

190

#define TTR40_CM PTE40_CM

sys/arch/m68k/include/mmu_40.h

208

#define MMUSR40_CM PTE40_CM

sys/arch/m68k/include/pmap_68k.h

242

#define PTE_CMASK PTE40_CM

sys/arch/m68k/include/pte_motorola.h

111

#define PG_CMASK PTE40_CM /* cache mode mask */