AWIN_GMAC_MAC_MIIADDR
bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR, mii);
AWIN_GMAC_MAC_MIIADDR) & GMAC_MII_BUSY)) {
bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR, mii);
AWIN_GMAC_MAC_MIIADDR) & GMAC_MII_BUSY))