sys/arch/arm/ti/am18xx_pllc.c

112

PLLC_CLK(0, "pll0_auxclk", &am18xx_pllc_get_auxclk_rate);

sys/arch/arm/ti/am18xx_pllc.c

115

PLLC_CLK(0, "pll0_sysclk1", &am18xx_pllc_get_sysclk_rate),

sys/arch/arm/ti/am18xx_pllc.c

116

PLLC_CLK(1, "pll0_sysclk2", &am18xx_pllc_get_sysclk_rate),

sys/arch/arm/ti/am18xx_pllc.c

117

PLLC_CLK(2, "pll0_sysclk3", &am18xx_pllc_get_sysclk_rate),

sys/arch/arm/ti/am18xx_pllc.c

118

PLLC_CLK(3, "pll0_sysclk4", &am18xx_pllc_get_sysclk_rate),

sys/arch/arm/ti/am18xx_pllc.c

119

PLLC_CLK(4, "pll0_sysclk5", &am18xx_pllc_get_sysclk_rate),

sys/arch/arm/ti/am18xx_pllc.c

120

PLLC_CLK(5, "pll0_sysclk6", &am18xx_pllc_get_sysclk_rate),

sys/arch/arm/ti/am18xx_pllc.c

121

PLLC_CLK(6, "pll0_sysclk7", &am18xx_pllc_get_sysclk_rate),