Symbol: PLDA_ATR_AXI4_SLV0_TRSL_ADDR_LO
sys/arch/riscv/starfive/jh7110_pcie.c
521
WR4(sc, PLDA_ATR_AXI4_SLV0_TRSL_ADDR_LO(0), 0);
sys/arch/riscv/starfive/jh7110_pcie.c
549
WR4(sc, PLDA_ATR_AXI4_SLV0_TRSL_ADDR_LO(n), BUS_ADDR_LO32(pciaddr));