PIUB_REG_OFFSSET
#ifndef PIUB_REG_OFFSSET
#define PIUPB00_REG_W (PIUB_REG_OFFSSET+0x00) /* PIU Page 0 Buffer 0 reg */
#define PIUPB01_REG_W (PIUB_REG_OFFSSET+0x02) /* PIU Page 0 Buffer 1 reg */
#define PIUPB02_REG_W (PIUB_REG_OFFSSET+0x04) /* PIU Page 0 Buffer 2 reg */
#define PIUPB03_REG_W (PIUB_REG_OFFSSET+0x06) /* PIU Page 0 Buffer 3 reg */
#define PIUPB04_REG_W (PIUB_REG_OFFSSET+0x1C) /* PIU Page 0 Buffer 4 reg */
#define PIUPB10_REG_W (PIUB_REG_OFFSSET+0x08) /* PIU Page 1 Buffer 0 reg */
#define PIUPB11_REG_W (PIUB_REG_OFFSSET+0x0A) /* PIU Page 1 Buffer 1 reg */
#define PIUPB12_REG_W (PIUB_REG_OFFSSET+0x0C) /* PIU Page 1 Buffer 2 reg */
#define PIUPB13_REG_W (PIUB_REG_OFFSSET+0x0E) /* PIU Page 1 Buffer 3 reg */
#define PIUPB14_REG_W (PIUB_REG_OFFSSET+0x1E) /* PIU Page 1 Buffer 4 reg */
#define PIUAB0_REG_W (PIUB_REG_OFFSSET+0x10) /* PIU A/D scan Buffer 0 reg */
#define PIUAB1_REG_W (PIUB_REG_OFFSSET+0x12) /* PIU A/D scan Buffer 1 reg */
#define PIUAB2_REG_W (PIUB_REG_OFFSSET+0x14) /* PIU A/D scan Buffer 2 reg */
#define PIUAB3_REG_W (PIUB_REG_OFFSSET+0x16) /* PIU A/D scan Buffer 3 reg */