sys/dev/pci/pci_subr.c

1197

PCIREG_SHIFTOUT(rval, AGP_MODE_RQ) + 1);

sys/dev/pci/pci_subr.c

1199

PCIREG_SHIFTOUT(rval, AGP_MODE_ARQSZ));

sys/dev/pci/pci_subr.c

1201

pci_conf_print_agp_calcycle(PCIREG_SHIFTOUT(rval, AGP_MODE_CAL)));

sys/dev/pci/pci_subr.c

1214

PCIREG_SHIFTOUT(rval, AGP_MODE_RQ) + 1);

sys/dev/pci/pci_subr.c

1216

PCIREG_SHIFTOUT(rval, AGP_MODE_ARQSZ));

sys/dev/pci/pci_subr.c

1218

pci_conf_print_agp_calcycle(PCIREG_SHIFTOUT(rval, AGP_MODE_CAL)));

sys/dev/pci/pci_subr.c

1295

PCIREG_SHIFTOUT(pmcsr, PCI_PMCSR_DATASEL_MASK));

sys/dev/pci/pci_subr.c

1297

PCIREG_SHIFTOUT(pmcsr, PCI_PMCSR_DATASCL_MASK));

sys/dev/pci/pci_subr.c

1304

PCIREG_SHIFTOUT(pmcsr, PCI_PMCSR_DATA));

sys/dev/pci/pci_subr.c

1317

mmc = PCIREG_SHIFTOUT(ctl, PCI_MSI_CTL_MMC_MASK);

sys/dev/pci/pci_subr.c

1318

mme = PCIREG_SHIFTOUT(ctl, PCI_MSI_CTL_MME_MASK);

sys/dev/pci/pci_subr.c

1428

PCIREG_SHIFTOUT(reg, PCIX_BRIDGE_2NDST_CLKF));

sys/dev/pci/pci_subr.c

1632

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_CAP_TYPE);

sys/dev/pci/pci_subr.c

1642

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_CAP_REV);

sys/dev/pci/pci_subr.c

1672

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_RANGE_UNITID));

sys/dev/pci/pci_subr.c

1675

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_RANGE_BUSNUM));

sys/dev/pci/pci_subr.c

1677

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_RANGE_FIRSTDEV));

sys/dev/pci/pci_subr.c

1679

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_RANGE_LASTDEV));

sys/dev/pci/pci_subr.c

1684

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_MSINUM));

sys/dev/pci/pci_subr.c

1685

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_GVASIZE);

sys/dev/pci/pci_subr.c

1691

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_PASIZE);

sys/dev/pci/pci_subr.c

1693

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_VASIZE);

sys/dev/pci/pci_subr.c

1698

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_MISNPPR));

sys/dev/pci/pci_subr.c

1706

PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC1_MSINUM));

sys/dev/pci/pci_subr.c

1948

PCIREG_SHIFTOUT(reg, PCIE_XCAP_IRQ));

sys/dev/pci/pci_subr.c

1956

switch (PCIREG_SHIFTOUT(reg, PCIE_DCAP_PHANTOM_FUNCS)) {

sys/dev/pci/pci_subr.c

1973

pci_print_pcie_L0s_latency(PCIREG_SHIFTOUT(reg, PCIE_DCAP_L0S_LATENCY));

sys/dev/pci/pci_subr.c

1975

pci_print_pcie_L1_latency(PCIREG_SHIFTOUT(reg, PCIE_DCAP_L1_LATENCY));

sys/dev/pci/pci_subr.c

1983

PCIREG_SHIFTOUT(reg, PCIE_DCAP_SLOT_PWR_LIM_VAL),

sys/dev/pci/pci_subr.c

1984

PCIREG_SHIFTOUT(reg, PCIE_DCAP_SLOT_PWR_LIM_SCALE));

sys/dev/pci/pci_subr.c

1998

128 << PCIREG_SHIFTOUT(reg, PCIE_DCSR_MAX_PAYLOAD));

sys/dev/pci/pci_subr.c

2004

128 << PCIREG_SHIFTOUT(reg, PCIE_DCSR_MAX_READ_REQ));

sys/dev/pci/pci_subr.c

2027

PCIREG_SHIFTOUT(reg, PCIE_LCAP_MAX_WIDTH));

sys/dev/pci/pci_subr.c

2029

switch (PCIREG_SHIFTOUT(reg, PCIE_LCAP_ASPM)) {

sys/dev/pci/pci_subr.c

2044

pci_print_pcie_L0s_latency(PCIREG_SHIFTOUT(reg,PCIE_LCAP_L0S_EXIT));

sys/dev/pci/pci_subr.c

2046

pci_print_pcie_L1_latency(PCIREG_SHIFTOUT(reg, PCIE_LCAP_L1_EXIT));

sys/dev/pci/pci_subr.c

2048

PCIREG_SHIFTOUT(reg, PCIE_LCAP_PORT));

sys/dev/pci/pci_subr.c

2089

switch (PCIREG_SHIFTOUT(reg, PCIE_LCSR_DRSSGNL)) {

sys/dev/pci/pci_subr.c

2109

PCIREG_SHIFTOUT(reg, PCIE_LCSR_LINKSPEED));

sys/dev/pci/pci_subr.c

2111

PCIREG_SHIFTOUT(reg, PCIE_LCSR_NLW));

sys/dev/pci/pci_subr.c

2136

pci_conf_print_pcie_power(PCIREG_SHIFTOUT(reg, PCIE_SLCAP_SPLV),

sys/dev/pci/pci_subr.c

2137

PCIREG_SHIFTOUT(reg, PCIE_SLCAP_SPLS));

sys/dev/pci/pci_subr.c

2272

switch (PCIREG_SHIFTOUT(reg, PCIE_DCAP2_TPH_COMP)) {

sys/dev/pci/pci_subr.c

2287

switch (PCIREG_SHIFTOUT(reg, PCIE_DCAP2_LNSYSCLS)) {

sys/dev/pci/pci_subr.c

2304

switch (PCIREG_SHIFTOUT(reg, PCIE_DCAP2_OBFF)) {

sys/dev/pci/pci_subr.c

2320

val = PCIREG_SHIFTOUT(reg, PCIE_DCAP2_MAX_EETLP);

sys/dev/pci/pci_subr.c

2323

switch (PCIREG_SHIFTOUT(reg, PCIE_DCAP2_EMGPWRRED)) {

sys/dev/pci/pci_subr.c

2357

switch (PCIREG_SHIFTOUT(reg, PCIE_DCSR2_OBFF_EN)) {

sys/dev/pci/pci_subr.c

2383

PCIREG_SHIFTOUT(reg, PCIE_LCAP2_SUP_LNKSV));

sys/dev/pci/pci_subr.c

2389

PCIREG_SHIFTOUT(reg, PCIE_LCAP2_LOWSKPOS_GENSUPPSV));

sys/dev/pci/pci_subr.c

2394

PCIREG_SHIFTOUT(reg, PCIE_LCAP2_LOWSKPOS_RECSUPPSV));

sys/dev/pci/pci_subr.c

2408

PCIREG_SHIFTOUT(reg, PCIE_LCSR2_TGT_LSPEED));

sys/dev/pci/pci_subr.c

2414

PCIREG_SHIFTOUT(reg, PCIE_LCSR2_SEL_DEEMP));

sys/dev/pci/pci_subr.c

2417

PCIREG_SHIFTOUT(reg, PCIE_LCSR2_TX_MARGIN));

sys/dev/pci/pci_subr.c

2422

PCIREG_SHIFTOUT(reg, PCIE_LCSR2_COMP_DEEMP));

sys/dev/pci/pci_subr.c

2429

PCIREG_SHIFTOUT(reg, PCIE_LCSR2_DEEMP_LVL));

sys/dev/pci/pci_subr.c

2442

switch (PCIREG_SHIFTOUT(reg, PCIE_LCSR2_DSCOMPN)) {

sys/dev/pci/pci_subr.c

2508

PCIREG_SHIFTOUT(reg, PCI_SATA_REV_MAJOR),

sys/dev/pci/pci_subr.c

2509

PCIREG_SHIFTOUT(reg, PCI_SATA_REV_MINOR));

sys/dev/pci/pci_subr.c

2520

PCIREG_SHIFTOUT(reg, PCI_SATA_BAR_OFFSET) * 4);

sys/dev/pci/pci_subr.c

2534

PCIREG_SHIFTOUT(reg, PCI_AF_LENGTH));

sys/dev/pci/pci_subr.c

2601

entries = PCIREG_SHIFTOUT(reg, PCI_EA_CAP1_NUMENTRIES);

sys/dev/pci/pci_subr.c

2609

(uint8_t)PCIREG_SHIFTOUT(reg, PCI_EA_CAP2_SECONDARY));

sys/dev/pci/pci_subr.c

2611

(uint8_t)PCIREG_SHIFTOUT(reg, PCI_EA_CAP2_SUBORDINATE));

sys/dev/pci/pci_subr.c

2625

entry_size = PCIREG_SHIFTOUT(reg, PCI_EA_ES);

sys/dev/pci/pci_subr.c

2628

bei = PCIREG_SHIFTOUT(reg, PCI_EA_BEI);

sys/dev/pci/pci_subr.c

2662

pci_conf_print_ea_cap_prop(PCIREG_SHIFTOUT(reg, PCI_EA_PP));

sys/dev/pci/pci_subr.c

2664

pci_conf_print_ea_cap_prop(PCIREG_SHIFTOUT(reg, PCI_EA_SP));

sys/dev/pci/pci_subr.c

2879

PCIREG_SHIFTOUT(reg, PCI_AER_FIRST_ERROR_PTR));

sys/dev/pci/pci_subr.c

2921

PCIREG_SHIFTOUT(reg, PCI_AER_ROOTERR_INT_MESSAGE));

sys/dev/pci/pci_subr.c

2929

PCIREG_SHIFTOUT(reg, PCI_AER_ERRSRC_ID_ERR_COR));

sys/dev/pci/pci_subr.c

2931

PCIREG_SHIFTOUT(reg, PCI_AER_ERRSRC_ID_ERR_UC));

sys/dev/pci/pci_subr.c

2946

if (PCIREG_SHIFTOUT(reg, PCIE_XCAP_VER_MASK) >= 2) {

sys/dev/pci/pci_subr.c

3047

count = PCIREG_SHIFTOUT(reg, PCI_VC_CAP1_EXT_COUNT);

sys/dev/pci/pci_subr.c

3049

n = PCIREG_SHIFTOUT(reg, PCI_VC_CAP1_LOWPRI_EXT_COUNT);

sys/dev/pci/pci_subr.c

3051

n = PCIREG_SHIFTOUT(reg, PCI_VC_CAP1_REFCLK);

sys/dev/pci/pci_subr.c

3054

parbsize = 1 << PCIREG_SHIFTOUT(reg, PCI_VC_CAP1_PORT_ARB_TABLE_SIZE);

sys/dev/pci/pci_subr.c

3067

arbtab = PCIREG_SHIFTOUT(reg, PCI_VC_CAP2_ARB_TABLE_OFFSET);

sys/dev/pci/pci_subr.c

3072

arbsel = PCIREG_SHIFTOUT(reg, PCI_VC_CONTROL_VC_ARB_SELECT);

sys/dev/pci/pci_subr.c

3104

n = PCIREG_SHIFTOUT(reg, PCI_VC_RESOURCE_CAP_MAX_TIME_SLOTS) + 1;

sys/dev/pci/pci_subr.c

3106

arbtab = PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3114

PCIREG_SHIFTOUT(reg, PCI_VC_RESOURCE_CTL_TCVC_MAP));

sys/dev/pci/pci_subr.c

3120

arbsel = PCIREG_SHIFTOUT(reg, PCI_VC_RESOURCE_CTL_PORT_ARB_SELECT);

sys/dev/pci/pci_subr.c

3122

n = PCIREG_SHIFTOUT(reg, PCI_VC_RESOURCE_CTL_VC_ID);

sys/dev/pci/pci_subr.c

3240

PCIREG_SHIFTOUT(reg, PCI_PWRBDGT_DATA_BASEPWR),

sys/dev/pci/pci_subr.c

3241

PCIREG_SHIFTOUT(reg, PCI_PWRBDGT_DATA_SCALE));

sys/dev/pci/pci_subr.c

3243

(uint8_t)PCIREG_SHIFTOUT(reg, PCI_PWRBDGT_PM_SUBSTAT));

sys/dev/pci/pci_subr.c

3245

PCIREG_SHIFTOUT(reg, PCI_PWRBDGT_PM_STAT));

sys/dev/pci/pci_subr.c

3248

(uint8_t)(PCIREG_SHIFTOUT(reg, PCI_PWRBDGT_TYPE))));

sys/dev/pci/pci_subr.c

3251

(uint8_t)(PCIREG_SHIFTOUT(reg, PCI_PWRBDGT_PWRRAIL))));

sys/dev/pci/pci_subr.c

3288

nent = PCIREG_SHIFTOUT(reg, PCI_RCLINK_DCL_ESDESC_NUMLINKENT);

sys/dev/pci/pci_subr.c

3291

(uint8_t)PCIREG_SHIFTOUT(reg, PCI_RCLINK_DCL_ESDESC_COMPID));

sys/dev/pci/pci_subr.c

3293

(uint8_t)PCIREG_SHIFTOUT(reg, PCI_RCLINK_DCL_ESDESC_PORTNUM));

sys/dev/pci/pci_subr.c

3305

(uint8_t)PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3308

(uint8_t)PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3334

nb = PCIREG_SHIFTOUT(lo, PCI_RCLINK_DCL_LINKADDR_LT1_N);

sys/dev/pci/pci_subr.c

3337

(uint8_t)PCIREG_SHIFTOUT(lo,

sys/dev/pci/pci_subr.c

3340

(uint8_t)PCIREG_SHIFTOUT(lo,

sys/dev/pci/pci_subr.c

3343

(uint8_t)PCIREG_SHIFTOUT(lo,

sys/dev/pci/pci_subr.c

3370

PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3373

PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3403

size = PCIREG_SHIFTOUT(cap, PCI_ACS_CAP_ECVSIZE);

sys/dev/pci/pci_subr.c

3441

PCIREG_SHIFTOUT(reg, PCI_ARI_CAP_NXTFN));

sys/dev/pci/pci_subr.c

3446

PCIREG_SHIFTOUT(reg, PCI_ARI_CTL_FUNCGRP));

sys/dev/pci/pci_subr.c

3461

num = PCIREG_SHIFTOUT(reg, PCI_ATS_CAP_INVQDEPTH);

sys/dev/pci/pci_subr.c

3471

PCIREG_SHIFTOUT(reg, PCI_ATS_CTL_STU));

sys/dev/pci/pci_subr.c

3507

PCIREG_SHIFTOUT(reg, PCI_SRIOV_CAP_VF_MIGRATION_INTMSG_N));

sys/dev/pci/pci_subr.c

3586

PCIREG_SHIFTOUT(reg, PCI_SRIOV_VF_MIG_STA_OFFSET));

sys/dev/pci/pci_subr.c

3587

i = PCIREG_SHIFTOUT(reg, PCI_SRIOV_VF_MIG_STA_BIR);

sys/dev/pci/pci_subr.c

3618

n = PCIREG_SHIFTOUT(reg, PCI_MCAST_CAP_WINSIZEREQ);

sys/dev/pci/pci_subr.c

3626

PCIREG_SHIFTOUT(reg, PCI_MCAST_CTL_NUMGRP) + 1);

sys/dev/pci/pci_subr.c

3710

bars = PCIREG_SHIFTOUT(ctl, PCI_RESIZBAR_CTL_NUMBAR);

sys/dev/pci/pci_subr.c

3742

PCIREG_SHIFTOUT(ctl, PCI_RESIZBAR_CTL_BARIDX));

sys/dev/pci/pci_subr.c

3745

<< PCIREG_SHIFTOUT(ctl, PCI_RESIZBAR_CTL_BARSIZ),

sys/dev/pci/pci_subr.c

3766

substmax = PCIREG_SHIFTOUT(reg, PCI_DPA_CAP_SUBSTMAX);

sys/dev/pci/pci_subr.c

3769

switch (PCIREG_SHIFTOUT(reg, PCI_DPA_CAP_TLUINT)) {

sys/dev/pci/pci_subr.c

3784

switch (PCIREG_SHIFTOUT(reg, PCI_DPA_CAP_PAS)) {

sys/dev/pci/pci_subr.c

3799

PCIREG_SHIFTOUT(reg, PCI_DPA_CAP_XLCY0));

sys/dev/pci/pci_subr.c

3801

PCIREG_SHIFTOUT(reg, PCI_DPA_CAP_XLCY1));

sys/dev/pci/pci_subr.c

3809

PCIREG_SHIFTOUT(reg, PCI_DPA_CS_SUBSTSTAT));

sys/dev/pci/pci_subr.c

3813

PCIREG_SHIFTOUT(reg, PCI_DPA_CS_SUBSTCTL));

sys/dev/pci/pci_subr.c

3851

sttbloc = PCIREG_SHIFTOUT(reg, PCI_TPH_REQ_CAP_STTBLLOC);

sys/dev/pci/pci_subr.c

3855

size = PCIREG_SHIFTOUT(reg, PCI_TPH_REQ_CAP_STTBLSIZ) + 1;

sys/dev/pci/pci_subr.c

3862

switch (PCIREG_SHIFTOUT(reg, PCI_TPH_REQ_CTL_STSEL)) {

sys/dev/pci/pci_subr.c

3877

switch (PCIREG_SHIFTOUT(reg, PCI_TPH_REQ_CTL_TPHREQEN)) {

sys/dev/pci/pci_subr.c

3918

(uintmax_t)(PCIREG_SHIFTOUT(reg, PCI_LTR_MAXSNOOPLAT_VAL)

sys/dev/pci/pci_subr.c

3919

* PCI_LTR_SCALETONS(PCIREG_SHIFTOUT(reg, PCI_LTR_MAXSNOOPLAT_SCALE))));

sys/dev/pci/pci_subr.c

3922

(uintmax_t)(PCIREG_SHIFTOUT(reg, PCI_LTR_MAXNOSNOOPLAT_VAL)

sys/dev/pci/pci_subr.c

3923

* PCI_LTR_SCALETONS(PCIREG_SHIFTOUT(reg, PCI_LTR_MAXNOSNOOPLAT_SCALE))));

sys/dev/pci/pci_subr.c

3942

PCIREG_SHIFTOUT(reg, PCI_SECPCIE_LCTL3_ELSKPOSGENV));

sys/dev/pci/pci_subr.c

3951

maxlinkwidth = PCIREG_SHIFTOUT(reg, PCIE_LCAP_MAX_WIDTH);

sys/dev/pci/pci_subr.c

3965

PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3968

PCIREG_SHIFTOUT(reg, PCI_SECPCIE_EQCTL_DP_RCV_HINT));

sys/dev/pci/pci_subr.c

3970

PCIREG_SHIFTOUT(reg,

sys/dev/pci/pci_subr.c

3973

PCIREG_SHIFTOUT(reg, PCI_SECPCIE_EQCTL_UP_RCV_HINT));

sys/dev/pci/pci_subr.c

3993

num = (1 << PCIREG_SHIFTOUT(reg, PCI_PASID_CAP_MAXPASIDW)) - 1;

sys/dev/pci/pci_subr.c

4016

num = 1 << PCIREG_SHIFTOUT(reg, PCI_LNR_CAP_REGISTMAX);

sys/dev/pci/pci_subr.c

4022

num = 1 << PCIREG_SHIFTOUT(reg, PCI_LNR_CTL_REGISTLIM);

sys/dev/pci/pci_subr.c

4061

PCIREG_SHIFTOUT(reg, PCI_DPCCAP_RPPIOLOGSZ));

sys/dev/pci/pci_subr.c

4065

switch (PCIREG_SHIFTOUT(reg, PCI_DPCCTL_TIRGEN)) {

sys/dev/pci/pci_subr.c

4095

switch (PCIREG_SHIFTOUT(reg, PCI_DPCSTAT_TREASON)) {

sys/dev/pci/pci_subr.c

4113

switch (PCIREG_SHIFTOUT(reg, PCI_DPCSTAT_TREASON)) {

sys/dev/pci/pci_subr.c

4127

PCIREG_SHIFTOUT(reg, PCI_DPCSTAT_RPPIOFEP));

sys/dev/pci/pci_subr.c

4208

PCIREG_SHIFTOUT(reg, PCI_L1PM_CAP_PCMRT));

sys/dev/pci/pci_subr.c

4210

PCIREG_SHIFTOUT(reg, PCI_L1PM_CAP_PTPOSCALE));

sys/dev/pci/pci_subr.c

4211

val = PCIREG_SHIFTOUT(reg, PCI_L1PM_CAP_PTPOVAL);

sys/dev/pci/pci_subr.c

4227

PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL1_CMRT));

sys/dev/pci/pci_subr.c

4228

scale = PCI_LTR_SCALETONS(PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL1_LTRTHSCALE));

sys/dev/pci/pci_subr.c

4229

val = PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL1_LTRTHVAL);

sys/dev/pci/pci_subr.c

4235

PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL2_TPOSCALE));

sys/dev/pci/pci_subr.c

4236

val = PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL2_TPOVAL);

sys/dev/pci/pci_subr.c

4264

val = PCIREG_SHIFTOUT(reg, PCI_PTM_CAP_LCLCLKGRNL);

sys/dev/pci/pci_subr.c

4282

val = PCIREG_SHIFTOUT(reg, PCI_PTM_CTL_EFCTGRNL);

sys/dev/pci/pci_subr.c

4359

lwidth = PCIREG_SHIFTOUT(reg, PCIE_LCAP_MAX_WIDTH);

sys/dev/pci/pci_subr.c

4418

rnum = PCIREG_SHIFTOUT(reg, PCI_LMR_LCTL_RNUM);

sys/dev/pci/pci_subr.c

4427

PCIREG_SHIFTOUT(reg, PCI_LMR_LCTL_MTYPE));

sys/dev/pci/pci_subr.c

4429

(PCIREG_SHIFTOUT(reg, PCI_LMR_LCTL_UMODEL) == 0)

sys/dev/pci/pci_subr.c

4432

PCIREG_SHIFTOUT(reg, PCI_LMR_LCTL_MPAYLOAD));

sys/dev/pci/pci_subr.c

4475

lwidth = PCIREG_SHIFTOUT(reg, PCIE_LCAP_MAX_WIDTH);

sys/dev/pci/pci_subr.c

4699

devsel = PCIREG_SHIFTOUT(rval, __BITS(10, 9));

sys/dev/pci/pci_subr.c

4754

switch (PCIREG_SHIFTOUT(rval, PCI_MAPREG_ROM_VALID_STAT)) {

sys/dev/pci/pci_subr.c

4785

PCIREG_SHIFTOUT(rval, PCI_MAPREG_ROM_VALID_DETAIL));

sys/dev/pci/pci_subr.c

4862

pci_conf_print_ssr(PCIREG_SHIFTOUT(rval, __BITS(31, 16)));

sys/dev/pci/pci_subr.c

4877

base_h = PCIREG_SHIFTOUT(rval, PCI_BRIDGE_IOHIGH_BASE);

sys/dev/pci/pci_subr.c

4878

limit_h = PCIREG_SHIFTOUT(rval, PCI_BRIDGE_IOHIGH_LIMIT);

sys/dev/pci/pci_subr.c

4898

(uint16_t)PCIREG_SHIFTOUT(rval, PCI_BRIDGE_MEMORY_BASE));

sys/dev/pci/pci_subr.c

4900

(uint16_t)PCIREG_SHIFTOUT(rval, PCI_BRIDGE_MEMORY_LIMIT));

sys/dev/pci/pci_subr.c

4980

(uint16_t)PCIREG_SHIFTOUT(rval, PCI_BRIDGE_CONTROL));

sys/dev/pci/pci_subr.c

5037

PCIREG_SHIFTOUT(rval, __BITS(15, 0)));

sys/dev/pci/pci_subr.c

5038

pci_conf_print_ssr(PCIREG_SHIFTOUT(rval, __BITS(31, 16)));

sys/dev/pci/pci_subr.c

901

printf(" (0x%x)\n", PCIREG_SHIFTOUT(rval, PCI_STATUS_DEVSEL_MASK));