Symbol: A10_CLK_PLL_DDR_BASE
sys/arch/arm/sunxi/sun4i_a10_ccu.c
222
SUNXI_CCU_NKMP(A10_CLK_PLL_DDR_BASE, "pll_ddr_other", "osc24m",
sys/arch/arm/sunxi/sun4i_a10_ccu.c
889
clkp = &sun4i_a10_ccu_clks[A10_CLK_PLL_DDR_BASE].base;