NEXT_SLOT_ID_BMAP
#define NEXT_P_ENET (NEXT_SLOT_ID_BMAP+0x02006000)
#define NEXT_P_DSP (NEXT_SLOT_ID_BMAP+0x02008000)
#define NEXT_P_DISK (NEXT_SLOT_ID_BMAP+0x02012000)
#define NEXT_P_SCSI (NEXT_SLOT_ID_BMAP+0x02014000)
#define NEXT_P_FLOPPY (NEXT_SLOT_ID_BMAP+0x02014100)
#define NEXT_P_TIMER (NEXT_SLOT_ID_BMAP+0x02016000)
#define NEXT_P_TIMER_CSR (NEXT_SLOT_ID_BMAP+0x02016004)
#define NEXT_P_SCC (NEXT_SLOT_ID_BMAP+0x02018000)
#define NEXT_P_SCC_CLK (NEXT_SLOT_ID_BMAP+0x02018004)
#define NEXT_P_EVENTC (NEXT_SLOT_ID_BMAP+0x0201a000)
#define NEXT_P_C16_DAC_0 (NEXT_SLOT_ID_BMAP+0x02018100) /* COLOR_FB - RAMDAC */
#define NEXT_P_C16_DAC_1 (NEXT_SLOT_ID_BMAP+0x02018101)
#define NEXT_P_C16_DAC_2 (NEXT_SLOT_ID_BMAP+0x02018102)
#define NEXT_P_C16_DAC_3 (NEXT_SLOT_ID_BMAP+0x02018103)
#define NEXT_P_C16_CMD_REG (NEXT_SLOT_ID_BMAP+0x02018180) /* COLOR_FB - CSR */
#define NEXT_P_MEMTIMING (NEXT_SLOT_ID_BMAP+0x02006010)
#define NEXT_P_BRIGHTNESS (NEXT_SLOT_ID_BMAP+0x02010000)
#define NEXT_P_DRAM_TIMING (NEXT_SLOT_ID_BMAP+0x02018190) /* Warp 9C memory ctlr */
#define NEXT_P_VRAM_TIMING (NEXT_SLOT_ID_BMAP+0x02018198) /* Warp 9C memory ctlr */