NCR5380_READ
NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
mode = NCR5380_READ(ncr_sc, sci_mode);
mode = NCR5380_READ(ncr_sc, sci_mode);
mode = NCR5380_READ(ncr_sc, sci_mode);
NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
bus = NCR5380_READ(sc, sci_bus_csr);
bus = NCR5380_READ(sc, sci_bus_csr);
data = NCR5380_READ(sc, sci_data) & 0xFF;
bus = NCR5380_READ(sc, sci_bus_csr);
phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
msg = NCR5380_READ(sc, sci_data);
if (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_AIP)
if (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_LST) {
(NCR5380_READ(sc, sci_icmd) & SCI_ICMD_LST)) {
if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY)
if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) == 0) {
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
if (NCR5380_READ(sc, sci_csr) & SCI_CSR_PERR) {
*sc->sc_imp++ = NCR5380_READ(sc, sci_data);
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) {
if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) == phase) {
if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0) {
if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ)
phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
if (NCR5380_READ(sc, sci_csr) & SCI_CSR_PERR) {
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase)
icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase)
*data++ = NCR5380_READ(sc, sci_data);
(void) NCR5380_READ(sc, sci_data);
#define SCI_CLR_INTR(sc) NCR5380_READ(sc, sci_iack)
#define SCI_BUSY(sc) (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY)
if ((NCR5380_READ(sc,sci_csr) &
if ((NCR5380_READ(sc, sci_csr) & SCI_CSR_PHASE_MATCH) == 0 ||
if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0 ||
(NCR5380_READ(sc, sci_csr) & SCI_CSR_PHASE_MATCH) == 0 ||
NCR5380_READ(ncr_sc, sci_mode) | SCI_MODE_DMA);
NCR5380_READ(ncr_sc, sci_mode) & ~SCI_MODE_DMA);
icmd = NCR5380_READ(ncr_sc, sci_icmd) & SCI_ICMD_RMASK;
NCR5380_READ(ncr_sc, sci_mode) | SCI_MODE_DMA);
if ((NCR5380_READ(ncr_sc, sci_csr)
NCR5380_READ(ncr_sc, sci_mode) & ~SCI_MODE_DMA);
status = NCR5380_READ(sc, sci_csr);
if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0 ||
(NCR5380_READ(sc, sci_csr) & SCI_CSR_PHASE_MATCH) == 0 ||
NCR5380_READ(ncr_sc, sci_mode) | SCI_MODE_DMA);
NCR5380_READ(ncr_sc, sci_mode) & ~SCI_MODE_DMA);
icmd = NCR5380_READ(ncr_sc, sci_icmd) & SCI_ICMD_RMASK;
NCR5380_READ(ncr_sc, sci_mode) | SCI_MODE_DMA);
if ((NCR5380_READ(ncr_sc, sci_csr)
NCR5380_READ(ncr_sc, sci_mode) & ~SCI_MODE_DMA);
mode = NCR5380_READ(ncr_sc, sci_mode);
mode = NCR5380_READ(ncr_sc, sci_mode);
mode = NCR5380_READ(ncr_sc, sci_mode);