/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_QCOM_IPQ5018_CMN_PLL_H
#define _DT_BINDINGS_CLK_QCOM_IPQ5018_CMN_PLL_H

/* CMN PLL core clock. */
#define IPQ5018_CMN_PLL_CLK                     0

/* The output clocks from CMN PLL of IPQ5018. */
#define IPQ5018_XO_24MHZ_CLK                    1
#define IPQ5018_SLEEP_32KHZ_CLK                 2
#define IPQ5018_ETH_50MHZ_CLK                   3
#endif