amdgpu_reg_get_smn_base64
amdgpu_reg_get_smn_base64(adev, MP0_HWIP, instance);
amdgpu_reg_get_smn_base64(adev, MP0_HWIP, instance);
amdgpu_reg_get_smn_base64(adev, MP0_HWIP, instance);
uint64_t amdgpu_reg_get_smn_base64(struct amdgpu_device *adev,
amdgpu_reg_get_smn_base64(adev, XGMI_HWIP, xgmi_inst);
smn_base = amdgpu_reg_get_smn_base64(adev, XGMI_HWIP, xgmi_inst);
addr += amdgpu_reg_get_smn_base64(adev, XGMI_HWIP, i);
smn_addr + amdgpu_reg_get_smn_base64(adev, XGMI_HWIP, i);
amdgpu_reg_get_smn_base64(adev, MP0_HWIP, i);
amdgpu_reg_get_smn_base64(adev, ip##_HWIP, inst))
amdgpu_reg_get_smn_base64(adev, ip##_HWIP, inst), \