alvium_write_hshake
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_MIPI_DATA_FORMAT_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_BAYER_PATTERN_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_ACQUISITION_FRAME_RATE_EN_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_FRAME_START_TRIGGER_MODE_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_ACQUISITION_FRAME_RATE_RW,
ret = alvium_write_hshake(alvium, on ? REG_BCRM_ACQUISITION_START_RW :
ret = alvium_write_hshake(alvium, REG_BCRM_GAIN_RW, (u64)gain);
ret = alvium_write_hshake(alvium, REG_BCRM_GAIN_AUTO_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_WHITE_BALANCE_AUTO_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_EXPOSURE_TIME_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_BLUE_BALANCE_RATIO_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_RED_BALANCE_RATIO_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_WHITE_BALANCE_AUTO_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_HUE_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_CONTRAST_VALUE_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_SATURATION_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_GAMMA_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_SHARPNESS_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_REVERSE_X_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_REVERSE_Y_RW, (u64)val);
ret = alvium_write_hshake(alvium, REG_BCRM_CSI2_LANE_COUNT_RW,
ret = alvium_write_hshake(alvium, REG_BCRM_CSI2_CLOCK_RW, csi_clk);
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_WIDTH_RW, width);
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_HEIGHT_RW, height);
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_OFFSET_X_RW, offx);
ret = alvium_write_hshake(alvium, REG_BCRM_IMG_OFFSET_Y_RW, offy);