appl_writel
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK,
appl_writel(pcie, APPL_DM_TYPE_RP, APPL_DM_TYPE);
appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE);
appl_writel(pcie, val | APPL_CTRL_SYS_PRE_DET_STATE, APPL_CTRL);
appl_writel(pcie, val, APPL_CFG_MISC);
appl_writel(pcie, val, APPL_PINMUX);
appl_writel(pcie, val, APPL_PINMUX);
appl_writel(pcie,
appl_writel(pcie, val, APPL_RADM_STATUS);
appl_writel(pcie, 0x0, APPL_INTR_EN_L0_0);
appl_writel(pcie, data, APPL_PINMUX);
appl_writel(pcie, data, APPL_PINMUX);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17);
appl_writel(pcie, val, APPL_DM_TYPE);
appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, val, APPL_CFG_MISC);
appl_writel(pcie, val, APPL_PINMUX);
appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK,
appl_writel(pcie, pcie->atu_dma_res->start &
appl_writel(pcie, val, APPL_INTR_EN_L0_0);
appl_writel(pcie, val, APPL_INTR_EN_L1_0_0);
appl_writel(pcie, val, APPL_LTR_MSG_2);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, 1, APPL_LEGACY_INTX);
appl_writel(pcie, 0, APPL_LEGACY_INTX);
appl_writel(pcie, BIT(irq - 1), APPL_MSI_CTRL_1);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0);
appl_writel(pcie, val, APPL_CAR_RESET_OVRD);
appl_writel(pcie, val, APPL_CAR_RESET_OVRD);
appl_writel(pcie,
appl_writel(pcie,
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17);
appl_writel(pcie, 0xFFFFFFFF, APPL_MSI_CTRL_2);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, val, APPL_LTR_MSG_1);
appl_writel(pcie, val, APPL_LTR_MSG_2);
appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0);
appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_15);
appl_writel(pcie, status_l0, APPL_INTR_STATUS_L0);
appl_writel(pcie, val, APPL_INTR_EN_L0_0);
appl_writel(pcie, val, APPL_INTR_EN_L1_0_0);
appl_writel(pcie, val, APPL_INTR_EN_L0_0);
appl_writel(pcie, val, APPL_INTR_EN_L1_18);
appl_writel(pcie, val, APPL_INTR_EN_L0_0);
appl_writel(pcie, val, APPL_INTR_EN_L1_8_0);
appl_writel(pcie, val, APPL_INTR_EN_L0_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15);
appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17);
appl_writel(pcie, val, APPL_PINMUX);
appl_writel(pcie, val, APPL_CTRL);
appl_writel(pcie, val, APPL_PINMUX);
appl_writel(pcie, val, APPL_CTRL);