apll
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
[apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
[apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
[apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
[apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
[apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
[apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK3288_PLL_CON(0),
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
[apll] = PLL(pll_rk3399, PLL_APLL, "apll", mux_pll_p, 0, RV1108_PLL_CON(0),
[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
#define E3250_CPU_DIV0(apll, pclk_dbg, atb, corem) \
(((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
[apll] = PLL(pll_4508, CLK_FOUT_APLL, "fout_apll", "fin_pll",
[apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll",
#define E4210_CPU_DIV0(apll, pclk_dbg, atb, periph, corem1, corem0) \
(((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
exynos4210_plls[apll].rate_table =
exynos4x12_plls[apll].rate_table =
[apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
#define E5250_CPU_DIV0(apll, pclk_dbg, atb, periph, acp, cpud) \
((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
exynos5250_plls[apll].rate_table = apll_24mhz_tbl;
[apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
[apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
#define E5420_EGL_DIV0(apll, pclk_dbg, atb, cpud) \
((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl;
[apll] = PLL(pll_4508, FOUT_APLL, "fout_apll", "fin_pll",
[apll] = PLL(pll_4502, FOUT_APLL, "fout_apll", "fin_pll",
state->apll = flags & SAA7115_FREQ_FL_APLL;
if (state->apll)
bool apll;
u8 apll = 0;
err = read_sys_apll_status(idtcm, &apll);
apll &= SYS_APLL_LOSS_LOCK_LIVE_MASK;
if (apll == SYS_APLL_LOSS_LOCK_LIVE_LOCKED &&
LOCK_TIMEOUT_MS, apll, dpll);
int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll)
return (apll == MT8183_APLL1) ? 180633600 : 196608000;
int apll = mt8183_get_apll_by_rate(afe, rate);
int apll_clk_id = apll == MT8183_APLL1 ?
int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll);
int apll;
apll = mt8183_get_apll_by_rate(afe, freq);
apll_rate = mt8183_get_apll_rate(afe, apll);
i2s_priv->mclk_apll = apll;
int apll;
apll = mt8183_get_apll_by_rate(afe, freq);
apll_rate = mt8183_get_apll_rate(afe, apll);
tdm_priv->mclk_apll = apll;
int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll)
return (apll == MT8186_APLL1) ? 180633600 : 196608000;
int apll = mt8186_get_apll_by_rate(afe, rate);
int apll_clk_id = apll == MT8186_APLL1 ?
int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll);
int apll;
apll = mt8186_get_apll_by_rate(afe, freq);
apll_rate = mt8186_get_apll_rate(afe, apll);
i2s_priv->mclk_apll = apll;
int apll;
apll = mt8186_get_apll_by_rate(afe, freq);
apll_rate = mt8186_get_apll_rate(afe, apll);
tdm_priv->mclk_apll = apll;
int mt8188_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll)
int clk_id = mt8188_afe_get_mclk_source_clk_id(apll);
int mt8188_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll);
int apll;
apll = mt8188_afe_get_default_mclk_source_by_rate(freq);
apll = etdm_data->mclk_apll;
apll_rate = mt8188_afe_get_mclk_source_rate(afe, apll);
dev_err(afe->dev, "APLL%d cannot generate freq Hz\n", apll);
etdm_data->mclk_apll = apll;
int apll;
apll = etdm_data->mclk_apll;
apll_clk_id = mt8188_afe_get_mclk_source_clk_id(apll);
int mt8189_get_apll_rate(struct mtk_base_afe *afe, int apll)
if (apll < MT8189_APLL1 || apll > MT8189_APLL2) {
dev_warn(afe->dev, "invalid clk id %d\n", apll);
if (apll == MT8189_APLL1)
int apll = mt8189_get_apll_by_rate(afe, rate);
int apll_clk_id = apll == MT8189_APLL1 ?
int mt8189_get_apll_rate(struct mtk_base_afe *afe, int apll);
int apll;
apll = mt8189_get_apll_by_rate(afe, freq);
apll_rate = mt8189_get_apll_rate(afe, apll);
i2s_priv->mclk_apll = apll;
int apll;
apll = mt8189_get_apll_by_rate(afe, freq);
apll_rate = mt8189_get_apll_rate(afe, apll);
tdm_priv->mclk_apll = apll;
int mt8192_get_apll_rate(struct mtk_base_afe *afe, int apll)
return (apll == MT8192_APLL1) ? 180633600 : 196608000;
int apll = mt8192_get_apll_by_rate(afe, rate);
int apll_clk_id = apll == MT8192_APLL1 ?
int mt8192_get_apll_rate(struct mtk_base_afe *afe, int apll);
int apll;
apll = mt8192_get_apll_by_rate(afe, freq);
apll_rate = mt8192_get_apll_rate(afe, apll);
i2s_priv->mclk_apll = apll;
int apll;
apll = mt8192_get_apll_by_rate(afe, freq);
apll_rate = mt8192_get_apll_rate(afe, apll);
tdm_priv->mclk_apll = apll;
int mt8195_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll)
int clk_id = mt8195_afe_get_mclk_source_clk_id(apll);
int mt8195_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll);
int apll;
apll = etdm_data->mclk_apll;
apll_clk_id = mt8195_afe_get_mclk_source_clk_id(apll);
int apll;
apll = mt8195_afe_get_default_mclk_source_by_rate(freq);
apll_rate = mt8195_afe_get_mclk_source_rate(afe, apll);
dev_info(afe->dev, "APLL%d cannot generate freq Hz\n", apll);
etdm_data->mclk_apll = apll;
int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll)
afe_priv->apll_tuner_ref_cnt[apll]++;
if (afe_priv->apll_tuner_ref_cnt[apll] != 1) {
if (apll == MT8365_AFE_APLL1) {
int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll)
afe_priv->apll_tuner_ref_cnt[apll]--;
if (afe_priv->apll_tuner_ref_cnt[apll] == 0) {
if (apll == MT8365_AFE_APLL1)
} else if (afe_priv->apll_tuner_ref_cnt[apll] < 0) {
afe_priv->apll_tuner_ref_cnt[apll] = 0;
int mt8365_afe_enable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll)
if (apll == MT8365_AFE_APLL1) {
int mt8365_afe_disable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll)
if (apll == MT8365_AFE_APLL1) {
int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll);
int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll);
int mt8365_afe_enable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll);
int mt8365_afe_disable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll);