amdgpu_kv_notify_message_to_smu
return amdgpu_kv_notify_message_to_smu(adev, enable ?
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON);
return amdgpu_kv_notify_message_to_smu(adev, enable ?
return amdgpu_kv_notify_message_to_smu(adev, enable ?
return amdgpu_kv_notify_message_to_smu(adev, enable ?
return amdgpu_kv_notify_message_to_smu(adev, enable ?
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerOFF);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_SAMPowerOFF);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_SAMPowerON);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_ACPPowerOFF);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_ACPPowerON);
ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_NBDPM_Enable);
ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_NBDPM_Disable);
ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_EnableCac);
amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DisableCac);
return amdgpu_kv_notify_message_to_smu(adev, freeze ?
return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_NoForcedLevel);
int amdgpu_kv_notify_message_to_smu(struct amdgpu_device *adev, u32 id);
return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DPM_Enable);
return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DPM_Disable);
return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_EnableBAPM);
return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DisableBAPM);
ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_SCLKDPM_GetEnabledMask);
return amdgpu_kv_notify_message_to_smu(adev, msg);