amdgpu_irq_put
amdgpu_irq_put(adev, ring->fence_drv.irq_src,
int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
amdgpu_irq_put(adev, &adev->crtc_irq, idx);
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
amdgpu_irq_put(adev, &adev->hpd_irq,
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
r = amdgpu_irq_put(adev, &adev->gfx.eop_irq,
r = amdgpu_irq_put(adev, &adev->gfx.eop_irq,
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
r = amdgpu_irq_put(adev, &adev->gfx.eop_irq,
r = amdgpu_irq_put(adev, &adev->gfx.eop_irq,
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.sq_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
amdgpu_irq_put(adev, &adev->jpeg.inst[i].ras_poison_irq, 0);
amdgpu_irq_put(adev, &adev->jpeg.inst->ras_poison_irq, 0);
amdgpu_irq_put(adev, &adev->jpeg.inst->ras_poison_irq, 0);
amdgpu_irq_put(adev, &adev->jpeg.inst->ras_poison_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.ack_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.ack_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->virt.ack_irq, 0);
amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
amdgpu_irq_put(adev, &adev->sdma.ecc_irq,
amdgpu_irq_put(adev, &adev->sdma.ecc_irq,
amdgpu_irq_put(adev, &adev->sdma.ecc_irq,
r = amdgpu_irq_put(adev, &adev->sdma.trap_irq,
r = amdgpu_irq_put(adev, &adev->sdma.trap_irq,
amdgpu_irq_put(adev, &adev->nbio.ras_controller_irq, 0);
amdgpu_irq_put(adev, &adev->nbio.ras_err_event_athub_irq, 0);
amdgpu_irq_put(adev, &adev->nbio.ras_err_event_athub_irq, 0);
amdgpu_irq_put(adev, &adev->nbio.ras_err_event_athub_irq, 0);
amdgpu_irq_put(adev, &vinst->ras_poison_irq, 0);
amdgpu_irq_put(adev, &vinst->ras_poison_irq, 0);
amdgpu_irq_put(adev, &adev->vcn.inst->ras_poison_irq, 0);
amdgpu_irq_put(adev, &adev->vcn.inst->ras_poison_irq, 0);
if (amdgpu_irq_put(adev, &adev->vline0_irq, irq_type))
if (amdgpu_irq_put(adev, &adev->pageflip_irq, irq_type))
rc = amdgpu_irq_put(adev, &adev->crtc_irq, irq_type);
rc = amdgpu_irq_put(adev, &adev->pageflip_irq, irq_type);
rc = amdgpu_irq_put(adev, &adev->vline0_irq, irq_type);
if (amdgpu_irq_put(adev, &adev->hpd_irq, irq_type))
amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
ret = amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);