amd64_pvt
static int gpu_get_node_map(struct amd64_pvt *pvt)
static void f15h_select_dct(struct amd64_pvt *pvt, u8 dct)
static unsigned long dct_determine_edac_cap(struct amd64_pvt *pvt)
static unsigned long umc_determine_edac_cap(struct amd64_pvt *pvt)
static void dct_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
static void debug_dump_dramcfg_low(struct amd64_pvt *pvt, u32 dclr, int chan)
static int umc_get_cs_mode(int dimm, u8 ctrl, struct amd64_pvt *pvt)
static inline int amd64_read_dct_pci_cfg(struct amd64_pvt *pvt, u8 dct,
static int umc_addr_mask_to_cs_size(struct amd64_pvt *pvt, u8 umc,
static void umc_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
static void umc_dump_misc_regs(struct amd64_pvt *pvt)
static void dct_dump_misc_regs(struct amd64_pvt *pvt)
static void dct_prep_chip_selects(struct amd64_pvt *pvt)
static void umc_prep_chip_selects(struct amd64_pvt *pvt)
static void umc_read_base_mask(struct amd64_pvt *pvt)
static void dct_read_base_mask(struct amd64_pvt *pvt)
static void umc_determine_memory_type(struct amd64_pvt *pvt)
static void dct_determine_memory_type(struct amd64_pvt *pvt)
static u64 get_error_address(struct amd64_pvt *pvt, struct mce *m)
static void read_dram_base_limit_regs(struct amd64_pvt *pvt, unsigned range)
struct amd64_pvt *pvt = mci->pvt_info;
static int k8_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct,
static int __set_scrub_rate(struct amd64_pvt *pvt, u32 new_bw, u32 min_rate)
static inline u32 get_umc_reg(struct amd64_pvt *pvt, u32 reg)
static int f10_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct,
static int f15_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct,
static int f15_m60h_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct,
static int f16_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct,
static void read_dram_ctl_register(struct amd64_pvt *pvt)
static u8 f15_m30h_determine_channel(struct amd64_pvt *pvt, u64 sys_addr,
static u8 f1x_determine_channel(struct amd64_pvt *pvt, u64 sys_addr,
static u64 f1x_get_norm_dct_addr(struct amd64_pvt *pvt, u8 range,
static int f10_process_possible_spare(struct amd64_pvt *pvt, u8 dct, int csrow)
struct amd64_pvt *pvt;
static u64 f1x_swap_interleaved_region(struct amd64_pvt *pvt, u64 sys_addr)
static int f1x_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
struct amd64_pvt *pvt = mci->pvt_info;
static int f15_m30h_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
static int f1x_translate_sysaddr_to_cs(struct amd64_pvt *pvt,
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt;
struct amd64_pvt *pvt;
static bool base_limit_match(struct amd64_pvt *pvt, u64 sys_addr, u8 nid)
reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
static void determine_ecc_sym_sz(struct amd64_pvt *pvt)
static void umc_read_mc_regs(struct amd64_pvt *pvt)
static void dct_read_mc_regs(struct amd64_pvt *pvt)
static u32 dct_get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
static u32 umc_get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr_orig)
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt;
struct amd64_pvt *pvt = mci->pvt_info;
static bool dct_ecc_enabled(struct amd64_pvt *pvt)
static bool umc_ecc_enabled(struct amd64_pvt *pvt)
umc_determine_edac_ctl_cap(struct mem_ctl_info *mci, struct amd64_pvt *pvt)
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
static int dct_hw_info_get(struct amd64_pvt *pvt)
static int umc_hw_info_get(struct amd64_pvt *pvt)
static int gpu_addr_mask_to_cs_size(struct amd64_pvt *pvt, u8 umc,
static void gpu_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
static void gpu_dump_misc_regs(struct amd64_pvt *pvt)
static u32 gpu_get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
static bool gpu_ecc_enabled(struct amd64_pvt *pvt)
static inline u32 gpu_get_umc_base(struct amd64_pvt *pvt, u8 umc, u8 channel)
static void gpu_read_mc_regs(struct amd64_pvt *pvt)
static void gpu_read_base_mask(struct amd64_pvt *pvt)
static void gpu_prep_chip_selects(struct amd64_pvt *pvt)
static int gpu_hw_info_get(struct amd64_pvt *pvt)
static void hw_info_put(struct amd64_pvt *pvt)
static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct,
static int per_family_init(struct amd64_pvt *pvt)
static unsigned int get_layer_size(struct amd64_pvt *pvt, u8 layer)
static int init_one_instance(struct amd64_pvt *pvt)
static bool instance_has_memory(struct amd64_pvt *pvt)
struct amd64_pvt *pvt = NULL;
pvt = kzalloc_obj(struct amd64_pvt);
struct amd64_pvt *pvt;
struct amd64_pvt *pvt;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info; \
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt = mci->pvt_info;
struct amd64_pvt *pvt;
static inline u64 get_dram_base(struct amd64_pvt *pvt, u8 i)
static inline u64 get_dram_limit(struct amd64_pvt *pvt, u8 i)
static inline u8 dct_sel_interleave_addr(struct amd64_pvt *pvt)
int (*dbam_to_cs)(struct amd64_pvt *pvt, u8 dct,
int (*hw_info_get)(struct amd64_pvt *pvt);
bool (*ecc_enabled)(struct amd64_pvt *pvt);
void (*dump_misc_regs)(struct amd64_pvt *pvt);
static inline u8 dram_intlv_en(struct amd64_pvt *pvt, unsigned int i)
static inline u8 dhar_valid(struct amd64_pvt *pvt)
static inline u32 dct_sel_baseaddr(struct amd64_pvt *pvt)