ads1018
static int ads1018_spi_read_exclusive(struct ads1018 *ads1018, __be16 *cnv,
ads1018->xfer.cs_change = hold_cs;
ret = spi_sync_locked(ads1018->spi, &ads1018->msg_read);
*cnv = ads1018->rx_buf[0];
static int ads1018_single_shot(struct ads1018 *ads1018,
u8 max_drate_mode = ads1018->chip_info->num_data_rate_mode_to_hz - 1;
u32 drate = ads1018->chip_info->data_rate_mode_to_hz[max_drate_mode];
u8 pga_mode = ads1018->chan_data[chan->scan_index].pga_mode;
.tx_buf = ads1018->tx_buf,
.len = sizeof(ads1018->tx_buf[0]),
.rx_buf = ads1018->rx_buf,
.len = sizeof(ads1018->rx_buf[0]),
ads1018->tx_buf[0] = cpu_to_be16(cfg);
ret = spi_sync_transfer(ads1018->spi, xfer, ARRAY_SIZE(xfer));
*cnv = be16_to_cpu(ads1018->rx_buf[0]);
struct ads1018 *ads1018 = iio_priv(indio_dev);
const struct ads1018_chip_info *chip_info = ads1018->chip_info;
ret = ads1018_single_shot(ads1018, chan, &cnv);
pga_mode = ads1018->chan_data[addr].pga_mode;
drate_mode = ads1018->chan_data[addr].data_rate_mode;
struct ads1018 *ads1018 = iio_priv(indio_dev);
*vals = (const int *)ads1018->chip_info->pga_mode_to_gain;
*vals = ads1018->chip_info->data_rate_mode_to_hz;
*length = ads1018->chip_info->num_data_rate_mode_to_hz;
struct ads1018 *ads1018 = iio_priv(indio_dev);
const struct ads1018_chip_info *info = ads1018->chip_info;
ads1018->chan_data[chan->scan_index].pga_mode = i;
ads1018->chan_data[chan->scan_index].data_rate_mode = i;
static void ads1018_set_trigger_enable(struct ads1018 *ads1018)
spi_bus_lock(ads1018->spi->controller);
ads1018_spi_read_exclusive(ads1018, NULL, true);
enable_irq(ads1018->drdy_irq);
static void ads1018_set_trigger_disable(struct ads1018 *ads1018)
disable_irq(ads1018->drdy_irq);
ads1018_spi_read_exclusive(ads1018, NULL, false);
spi_bus_unlock(ads1018->spi->controller);
struct ads1018 *ads1018 = iio_trigger_get_drvdata(trig);
ads1018_set_trigger_enable(ads1018);
ads1018_set_trigger_disable(ads1018);
struct ads1018 *ads1018 = iio_priv(indio_dev);
const struct ads1018_chip_info *chip_info = ads1018->chip_info;
pga = ads1018->chan_data[addr].pga_mode;
drate = ads1018->chan_data[addr].data_rate_mode;
ads1018->tx_buf[0] = cpu_to_be16(cfg);
ads1018->tx_buf[1] = 0;
return spi_write(ads1018->spi, ads1018->tx_buf, sizeof(ads1018->tx_buf));
struct ads1018 *ads1018 = iio_priv(indio_dev);
ads1018->tx_buf[0] = cpu_to_be16(cfg);
ads1018->tx_buf[1] = 0;
return spi_write(ads1018->spi, ads1018->tx_buf, sizeof(ads1018->tx_buf));
struct ads1018 *ads1018 = dev_id;
if (!gpiod_get_value(ads1018->drdy_gpiod))
iio_trigger_poll(ads1018->indio_trig);
struct ads1018 *ads1018 = iio_priv(indio_dev);
disable_irq(ads1018->drdy_irq);
ret = ads1018_spi_read_exclusive(ads1018, &scan.conv, true);
enable_irq(ads1018->drdy_irq);
ret = spi_read(ads1018->spi, ads1018->rx_buf, sizeof(ads1018->rx_buf));
scan.conv = ads1018->rx_buf[0];
struct ads1018 *ads1018 = iio_priv(indio_dev);
struct spi_device *spi = ads1018->spi;
ads1018->drdy_gpiod = devm_gpiod_get_optional(dev, con_id, GPIOD_IN);
if (IS_ERR(ads1018->drdy_gpiod))
return dev_err_probe(dev, PTR_ERR(ads1018->drdy_gpiod),
ads1018->drdy_irq = spi->irq;
else if (ads1018->drdy_gpiod)
ads1018->drdy_irq = gpiod_to_irq(ads1018->drdy_gpiod);
if (ads1018->drdy_irq < 0)
return dev_err_probe(dev, ads1018->drdy_irq,
if (ads1018->drdy_irq == 0)
ads1018->indio_trig = devm_iio_trigger_alloc(dev, "%s-dev%d-%s",
if (!ads1018->indio_trig)
iio_trigger_set_drvdata(ads1018->indio_trig, ads1018);
ads1018->indio_trig->ops = &ads1018_trigger_ops;
ret = devm_iio_trigger_register(dev, ads1018->indio_trig);
return devm_request_irq(dev, ads1018->drdy_irq, ads1018_irq_handler,
IRQF_NO_AUTOEN, ads1018->chip_info->name, ads1018);
struct ads1018 *ads1018;
indio_dev = devm_iio_device_alloc(dev, sizeof(*ads1018));
ads1018 = iio_priv(indio_dev);
ads1018->spi = spi;
ads1018->chip_info = info;
ads1018->chan_data[i].data_rate_mode = ADS1018_DRATE_DEFAULT;
ads1018->chan_data[i].pga_mode = ADS1018_PGA_DEFAULT;
ads1018->xfer.rx_buf = ads1018->rx_buf;
ads1018->xfer.len = sizeof(ads1018->rx_buf);
spi_message_init_with_transfers(&ads1018->msg_read, &ads1018->xfer, 1);