airoha_qdma_wr
airoha_qdma_wr(qdma, REG_TX_IRQ_BASE(id), dma_addr);
airoha_qdma_wr(qdma, REG_FWD_BUF_BASE, dma_addr);
airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);
airoha_qdma_wr(qdma, REG_CNTR_VAL(i << 1), 0);
airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
airoha_qdma_wr(qdma, REG_CNTR_VAL((i << 1) + 1), 0);
airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
airoha_qdma_wr(qdma, REG_INT_STATUS(i), 0xffffffff);
airoha_qdma_wr(qdma, REG_QDMA_GLOBAL_CFG,
airoha_qdma_wr(qdma, REG_INT_STATUS(i), intr[i]);
airoha_qdma_wr(port->qdma, REG_TXWRR_WEIGHT_CFG,
airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);
airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);
airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
airoha_qdma_wr(qdma, REG_INT_ENABLE(bank, index),
airoha_qdma_wr(qdma, REG_RX_RING_BASE(qid), dma_addr);
airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);