BXT_PORT_PLL
intel_de_rmw(display, BXT_PORT_PLL(phy, ch, 0),
intel_de_rmw(display, BXT_PORT_PLL(phy, ch, 1),
intel_de_rmw(display, BXT_PORT_PLL(phy, ch, 2),
intel_de_rmw(display, BXT_PORT_PLL(phy, ch, 3),
temp = intel_de_read(display, BXT_PORT_PLL(phy, ch, 6));
intel_de_write(display, BXT_PORT_PLL(phy, ch, 6), temp);
intel_de_rmw(display, BXT_PORT_PLL(phy, ch, 8),
intel_de_rmw(display, BXT_PORT_PLL(phy, ch, 9),
temp = intel_de_read(display, BXT_PORT_PLL(phy, ch, 10));
intel_de_write(display, BXT_PORT_PLL(phy, ch, 10), temp);
hw_state->pll0 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 0));
hw_state->pll1 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 1));
hw_state->pll2 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 2));
hw_state->pll3 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 3));
hw_state->pll6 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 6));
hw_state->pll8 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 8));
hw_state->pll9 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 9));
hw_state->pll10 = intel_de_read(display, BXT_PORT_PLL(phy, ch, 10));
vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 0))) << 22;
if (vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 3)) & PORT_PLL_M2_FRAC_ENABLE)
vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 2)));
vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 1)));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 9));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 10));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 0));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 1));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 2));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 3));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 6));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 8));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 9));
MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 10));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 0));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 1));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 2));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 3));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 6));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 8));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 9));
MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 10));