adv7511_wr_and_or
adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
adv7511_wr_and_or(sd, 0x17, 0x9f,
adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
adv7511_wr_and_or(sd, 0x95, 0xc0,