drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

128

struct adf_gen6_tl_cmdq_data_regs ath_cmdq[MAX_ATH_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

129

struct adf_gen6_tl_cmdq_data_regs cnv_cmdq[MAX_CNV_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

130

struct adf_gen6_tl_cmdq_data_regs dcprz_cmdq[MAX_DCPRZ_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

131

struct adf_gen6_tl_cmdq_data_regs pke_cmdq[MAX_PKE_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

132

struct adf_gen6_tl_cmdq_data_regs ucs_cmdq[MAX_UCS_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

133

struct adf_gen6_tl_cmdq_data_regs wat_cmdq[MAX_WAT_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

134

struct adf_gen6_tl_cmdq_data_regs wcp_cmdq[MAX_WCP_CMDQ_COUNT];

drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h

66

#define ADF_GEN6_TL_CMDQ_REG_SZ sizeof(struct adf_gen6_tl_cmdq_data_regs)