arch/arm64/kvm/sys_regs.c

3377

{ SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },

arch/arm64/kvm/sys_regs.c

3380

{ SYS_DESC(SYS_SCTLR2_EL1), access_vm_reg, reset_val, SCTLR2_EL1, 0,

arch/arm64/kvm/sys_regs.c

3390

{ SYS_DESC(SYS_TTBR0_EL1), access_vm_reg, reset_unknown, TTBR0_EL1 },

arch/arm64/kvm/sys_regs.c

3391

{ SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 },

arch/arm64/kvm/sys_regs.c

3392

{ SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },

arch/arm64/kvm/sys_regs.c

3393

{ SYS_DESC(SYS_TCR2_EL1), access_vm_reg, reset_val, TCR2_EL1, 0,

arch/arm64/kvm/sys_regs.c

3407

{ SYS_DESC(SYS_AFSR0_EL1), access_vm_reg, reset_unknown, AFSR0_EL1 },

arch/arm64/kvm/sys_regs.c

3408

{ SYS_DESC(SYS_AFSR1_EL1), access_vm_reg, reset_unknown, AFSR1_EL1 },

arch/arm64/kvm/sys_regs.c

3409

{ SYS_DESC(SYS_ESR_EL1), access_vm_reg, reset_unknown, ESR_EL1 },

arch/arm64/kvm/sys_regs.c

3428

{ SYS_DESC(SYS_FAR_EL1), access_vm_reg, reset_unknown, FAR_EL1 },

arch/arm64/kvm/sys_regs.c

3453

{ SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 },

arch/arm64/kvm/sys_regs.c

3460

{ SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 },

arch/arm64/kvm/sys_regs.c

3506

{ SYS_DESC(SYS_CONTEXTIDR_EL1), access_vm_reg, reset_val, CONTEXTIDR_EL1, 0 },

arch/arm64/kvm/sys_regs.c

3741

EL2_REG_FILTERED(SCTLR2_EL2, access_vm_reg, reset_val, 0,

arch/arm64/kvm/sys_regs.c

4545

{ Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, SCTLR_EL1 },

arch/arm64/kvm/sys_regs.c

4550

{ Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },

arch/arm64/kvm/sys_regs.c

4551

{ Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, TTBR1_EL1 },

arch/arm64/kvm/sys_regs.c

4553

{ AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },

arch/arm64/kvm/sys_regs.c

4555

{ AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },

arch/arm64/kvm/sys_regs.c

4556

{ Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, DACR32_EL2 },

arch/arm64/kvm/sys_regs.c

4559

{ Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1 },

arch/arm64/kvm/sys_regs.c

4560

{ Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, IFSR32_EL2 },

arch/arm64/kvm/sys_regs.c

4562

{ Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1 },

arch/arm64/kvm/sys_regs.c

4564

{ Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1 },

arch/arm64/kvm/sys_regs.c

4566

{ AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, FAR_EL1 },

arch/arm64/kvm/sys_regs.c

4568

{ AA32(HI), Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, FAR_EL1 },

arch/arm64/kvm/sys_regs.c

4599

{ AA32(LO), Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, MAIR_EL1 },

arch/arm64/kvm/sys_regs.c

4601

{ AA32(HI), Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, MAIR_EL1 },

arch/arm64/kvm/sys_regs.c

4603

{ AA32(LO), Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, AMAIR_EL1 },

arch/arm64/kvm/sys_regs.c

4605

{ AA32(HI), Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, AMAIR_EL1 },

arch/arm64/kvm/sys_regs.c

4630

{ Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, CONTEXTIDR_EL1 },

arch/arm64/kvm/sys_regs.c

4713

{ Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },

arch/arm64/kvm/sys_regs.c

4717

{ Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },