drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1074

static void a6xx_gmu_irq_disable(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1083

static void a6xx_gmu_rpmh_off(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1121

static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1168

static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1182

static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1199

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

124

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1253

static int a6xx_gmu_gxpd_get(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1277

static int a6xx_gmu_gxpd_put(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1308

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1393

bool a6xx_gmu_isidle(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1409

static void a6xx_gmu_shutdown(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

141

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1480

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1512

static void a6xx_gmu_memory_free(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1527

static int a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu, struct a6xx_gmu_bo *bo,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1568

static int a6xx_gmu_memory_probe(struct drm_device *drm, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1599

struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

161

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1834

static int a6xx_gmu_rpmh_votes_init(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1933

static int a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1976

static int a6xx_gmu_acd_probe(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2046

static int a6xx_gmu_clocks_probe(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2064

static int a6xx_gmu_get_irq(struct a6xx_gmu *gmu, struct platform_device *pdev,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2086

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2111

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2158

struct a6xx_gmu *gmu = container_of(nb, struct a6xx_gmu, pd_nb);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2193

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

22

static void a6xx_gmu_fault(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2279

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

255

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

260

static bool a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

286

int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

291

static int a6xx_gmu_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

333

static int a6xx_gmu_hfi_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

393

int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

40

struct a6xx_gmu *gmu = data;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

458

void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

482

int a6xx_sptprac_enable(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

507

void a6xx_sptprac_disable(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

529

static int a6xx_gmu_gfx_rail_on(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

546

static void a6xx_gemnoc_workaround(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

564

static int a6xx_gmu_notify_slumber(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

607

static int a6xx_rpmh_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

637

static void a6xx_rpmh_stop(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

64

struct a6xx_gmu *gmu = data;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

668

static void a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

79

bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

801

static void a6xx_gmu_power_config(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

863

static int a6xx_gmu_fw_load(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

928

static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

98

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

140

static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

146

static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

152

gmu_write_bulk(struct a6xx_gmu *gmu, u32 offset, const u32 *data, u32 size)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

158

static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

167

static inline u64 gmu_read64(struct a6xx_gmu *gmu, u32 lo, u32 hi)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

184

static inline u32 gmu_read_rscc(struct a6xx_gmu *gmu, u32 offset)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

189

static inline void gmu_write_rscc(struct a6xx_gmu *gmu, u32 offset, u32 value)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

231

void a6xx_hfi_init(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

232

int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

233

void a6xx_hfi_stop(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

234

int a6xx_hfi_send_prep_slumber(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

235

int a6xx_hfi_set_freq(struct a6xx_gmu *gmu, u32 perf_index, u32 bw_index);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

240

bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

241

void a6xx_sptprac_disable(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

242

int a6xx_sptprac_enable(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1177

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1565

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1882

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2159

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2245

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

56

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

639

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

274

int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

276

bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

278

int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

279

void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

94

struct a6xx_gmu gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1198

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1292

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

1011

void a6xx_hfi_stop(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

1059

void a6xx_hfi_init(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

111

static int a6xx_hfi_wait_for_msg_interrupt(struct a6xx_gmu *gmu, u32 id, u32 seqnum)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

149

static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

212

static int a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

235

static int a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

247

static int a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

258

static int a6xx_hfi_send_perf_table_v1(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

280

static int a8xx_hfi_send_perf_table(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

31

static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

329

static int a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

357

static void a6xx_generate_bw_table(const struct a6xx_info *info, struct a6xx_gmu *gmu,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

72

static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

799

static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

845

static int a6xx_hfi_feature_ctrl_msg(struct a6xx_gmu *gmu, u32 feature, u32 enable, u32 data)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

858

static int a6xx_hfi_enable_ifpc(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

866

static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

891

static int a6xx_hfi_send_test(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

899

static int a6xx_hfi_send_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

907

static int a6xx_hfi_send_core_fw_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

915

int a6xx_hfi_set_freq(struct a6xx_gmu *gmu, u32 freq_index, u32 bw_index)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

927

int a6xx_hfi_send_prep_slumber(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

937

static int a6xx_hfi_start_v1(struct a6xx_gmu *gmu, int boot_state)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

972

int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

200

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

625

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

873

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;