a6xx_cx_misc_read
fuse_val = a6xx_cx_misc_read(a6xx_gpu,
status = a6xx_cx_misc_read(a6xx_gpu, REG_A7XX_CX_MISC_TCM_RET_CNTL) == 1 ?
*speedbin = a6xx_cx_misc_read(a6xx_gpu, REG_A8XX_CX_MISC_SW_FUSE_FREQ_LIMIT_STATUS);
slice_mask &= a6xx_cx_misc_read(a6xx_gpu,