arch/arm/lib/uaccess_with_memcpy.c
23
pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
arch/arm/lib/uaccess_with_memcpy.c
25
unsigned long addr = (unsigned long)_addr;
arch/arm64/include/asm/gcs.h
21
register u64 *_addr __asm__ ("x0") = addr;
arch/arm64/include/asm/gcs.h
28
: "rZ" (_val), "r" (_addr)
arch/arm64/include/asm/gcs.h
86
register unsigned long __user *_addr __asm__ ("x0") = addr;
arch/arm64/include/asm/gcs.h
96
: "rZ" (_val), "r" (_addr)
arch/m68k/include/asm/raw_io.h
83
(void)({u8 __maybe_unused __w, __v = (b); u32 _addr = ((u32) (addr)); \
arch/m68k/include/asm/raw_io.h
84
__w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
arch/m68k/include/asm/raw_io.h
86
(void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
arch/m68k/include/asm/raw_io.h
87
__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
arch/m68k/include/asm/raw_io.h
88
__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
arch/m68k/include/asm/raw_io.h
90
(void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
arch/m68k/include/asm/raw_io.h
91
__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
arch/m68k/include/asm/raw_io.h
92
__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
arch/powerpc/include/asm/io.h
930
#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
arch/powerpc/include/asm/io.h
931
#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
arch/powerpc/include/asm/io.h
933
#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v))
arch/powerpc/include/asm/io.h
934
#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
arch/powerpc/include/asm/io.h
936
#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) | (_v))
arch/powerpc/include/asm/io.h
937
#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) & ~(_v))
arch/powerpc/include/asm/page.h
233
unsigned long _addr = (unsigned long)vaddr; \
arch/powerpc/include/asm/page.h
234
_addr >= PAGE_OFFSET && _addr < (unsigned long)high_memory && \
arch/powerpc/include/asm/page.h
235
pfn_valid(virt_to_pfn((void *)_addr)); \
arch/riscv/include/asm/page.h
177
unsigned long _addr = (unsigned long)vaddr; \
arch/riscv/include/asm/page.h
178
(unsigned long)(_addr) >= PAGE_OFFSET && pfn_valid(virt_to_pfn(_addr)); \
arch/x86/kernel/idt.c
21
#define G(_vector, _addr, _ist, _type, _dpl, _segment) \
arch/x86/kernel/idt.c
28
.addr = _addr, \
arch/x86/kernel/idt.c
33
#define INTG(_vector, _addr) \
arch/x86/kernel/idt.c
34
G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL0, __KERNEL_CS)
arch/x86/kernel/idt.c
37
#define SYSG(_vector, _addr) \
arch/x86/kernel/idt.c
38
G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL3, __KERNEL_CS)
arch/x86/kernel/idt.c
45
#define ISTG(_vector, _addr, _ist) \
arch/x86/kernel/idt.c
46
G(_vector, _addr, _ist + 1, GATE_INTERRUPT, DPL0, __KERNEL_CS)
arch/x86/kernel/idt.c
48
#define ISTG(_vector, _addr, _ist) INTG(_vector, _addr)
arch/x86/kernel/unwind_orc.c
403
static bool stack_access_ok(struct unwind_state *state, unsigned long _addr,
arch/x86/kernel/unwind_orc.c
407
void *addr = (void *)_addr;
arch/x86/kvm/mmu/mmu.c
166
#define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
arch/x86/kvm/mmu/mmu.c
168
(_root), (_addr)); \
arch/x86/kvm/mmu/mmu.c
172
#define for_each_shadow_entry(_vcpu, _addr, _walker) \
arch/x86/kvm/mmu/mmu.c
173
for (shadow_walk_init(&(_walker), _vcpu, _addr); \
arch/x86/kvm/mmu/mmu.c
177
#define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
arch/x86/kvm/mmu/mmu.c
178
for (shadow_walk_init(&(_walker), _vcpu, _addr); \
arch/x86/virt/vmx/tdx/tdx.c
427
#define TDMR_ALIGN_DOWN(_addr) ALIGN_DOWN((_addr), TDMR_ALIGNMENT)
arch/x86/virt/vmx/tdx/tdx.c
428
#define TDMR_ALIGN_UP(_addr) ALIGN((_addr), TDMR_ALIGNMENT)
drivers/cxl/core/hdm.c
537
struct resource _addr = DEFINE_RES_MEM(addr, 1);
drivers/cxl/core/hdm.c
539
return resource_contains(res, &_addr);
drivers/dma/amd/qdma/qdma.h
39
#define QDMA_INTR_RING_BASE(_addr) ((_addr) >> 12)
drivers/dpll/zl3073x/core.h
120
#define HWREG_SEQ_ITEM(_addr, _value, _mask, _wait) \
drivers/dpll/zl3073x/core.h
122
.addr = _addr, \
drivers/gpu/drm/nouveau/include/nvif/object.h
62
u32 _addr = (b), _data = nvif_rd32(__object, _addr); \
drivers/gpu/drm/nouveau/include/nvif/object.h
63
nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
133
u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
134
nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v)); \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
101
nvkm_wo32((o), _addr, *(_data++)); \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
102
_addr += 4; \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
79
u32 _addr = (a), _data = nvkm_ro32((o), _addr); \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
80
nvkm_wo32((o), _addr, (_data & ~(m)) | (d)); \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
91
u32 _addr = (a), _size = (s) >> 2, *_data = (void *)(p); \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
93
*(_data++) = nvkm_ro32((o), _addr); \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
94
_addr += 4; \
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
99
u32 _addr = (a), _size = (s) >> 2, *_data = (void *)(p); \
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
330
u64 _addr = ((BASE) + MAP->off); \
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
342
FILL(VMM, PT, PTEI, _ptes, MAP, _addr); \
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
380
const u64 _addr = (m)->addr + _pteo; \
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
381
VMM_SPAM((v), " %010llx %016llx%016llx"f, _addr, (hi), (lo), ##a); \
drivers/iio/accel/mxc4005.c
299
#define MXC4005_CHANNEL(_axis, _addr) { \
drivers/iio/accel/mxc4005.c
303
.address = _addr, \
drivers/iio/adc/ltc2309.c
76
#define LTC2309_CHAN(_chan, _addr) { \
drivers/iio/adc/ltc2309.c
79
.address = _addr, \
drivers/iio/adc/ltc2309.c
85
#define LTC2309_DIFF_CHAN(_chan, _chan2, _addr) { \
drivers/iio/adc/ltc2309.c
89
.address = _addr, \
drivers/iio/adc/ltc2497-core.c
108
#define LTC2497_CHAN(_chan, _addr, _ds_name) { \
drivers/iio/adc/ltc2497-core.c
112
.address = (_addr | (_chan / 2) | ((_chan & 1) ? LTC2497_SIGN : 0)), \
drivers/iio/adc/ltc2497-core.c
118
#define LTC2497_CHAN_DIFF(_chan, _addr) { \
drivers/iio/adc/ltc2497-core.c
121
.channel = (_chan) * 2 + ((_addr) & LTC2497_SIGN ? 1 : 0), \
drivers/iio/adc/ltc2497-core.c
122
.channel2 = (_chan) * 2 + ((_addr) & LTC2497_SIGN ? 0 : 1),\
drivers/iio/adc/ltc2497-core.c
123
.address = (_addr | _chan), \
drivers/iio/adc/mt6370-adc.c
261
#define MT6370_ADC_CHAN(_idx, _type, _addr, _extra_info) { \
drivers/iio/adc/mt6370-adc.c
264
.address = _addr, \
drivers/iio/adc/ti-ads1015.c
183
#define ADS1015_V_CHAN(_chan, _addr, _realbits, _shift, _event_spec, _num_event_specs) { \
drivers/iio/adc/ti-ads1015.c
186
.address = _addr, \
drivers/iio/adc/ti-ads1015.c
194
.scan_index = _addr, \
drivers/iio/adc/ti-ads1015.c
207
#define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr, _realbits, _shift, _event_spec, _num_event_specs) { \
drivers/iio/adc/ti-ads1015.c
211
.address = _addr, \
drivers/iio/adc/ti-ads1015.c
220
.scan_index = _addr, \
drivers/iio/adc/ti-ads7924.c
123
#define ADS7924_V_CHAN(_chan, _addr) { \
drivers/iio/adc/ti-ads7924.c
127
.address = _addr, \
drivers/iio/adc/xilinx-ams.c
225
#define AMS_CHAN_TEMP(_scan_index, _addr, _name) { \
drivers/iio/adc/xilinx-ams.c
228
.address = (_addr), \
drivers/iio/adc/xilinx-ams.c
238
#define AMS_CHAN_VOLTAGE(_scan_index, _addr, _alarm, _name) { \
drivers/iio/adc/xilinx-ams.c
241
.address = (_addr), \
drivers/iio/adc/xilinx-ams.c
250
#define AMS_PS_CHAN_TEMP(_scan_index, _addr, _name) \
drivers/iio/adc/xilinx-ams.c
251
AMS_CHAN_TEMP(PS_SEQ(_scan_index), _addr, _name)
drivers/iio/adc/xilinx-ams.c
252
#define AMS_PS_CHAN_VOLTAGE(_scan_index, _addr, _name) \
drivers/iio/adc/xilinx-ams.c
253
AMS_CHAN_VOLTAGE(PS_SEQ(_scan_index), _addr, true, _name)
drivers/iio/adc/xilinx-ams.c
255
#define AMS_PL_CHAN_TEMP(_scan_index, _addr, _name) \
drivers/iio/adc/xilinx-ams.c
256
AMS_CHAN_TEMP(PL_SEQ(_scan_index), _addr, _name)
drivers/iio/adc/xilinx-ams.c
257
#define AMS_PL_CHAN_VOLTAGE(_scan_index, _addr, _alarm, _name) \
drivers/iio/adc/xilinx-ams.c
258
AMS_CHAN_VOLTAGE(PL_SEQ(_scan_index), _addr, _alarm, _name)
drivers/iio/adc/xilinx-ams.c
262
#define AMS_CTRL_CHAN_VOLTAGE(_scan_index, _addr, _name) \
drivers/iio/adc/xilinx-ams.c
263
AMS_CHAN_VOLTAGE(PL_SEQ(AMS_SEQ(AMS_SEQ(_scan_index))), _addr, false, \
drivers/iio/adc/xilinx-xadc-core.c
1062
#define XADC_CHAN_TEMP(_chan, _scan_index, _addr, _bits) { \
drivers/iio/adc/xilinx-xadc-core.c
1066
.address = (_addr), \
drivers/iio/adc/xilinx-xadc-core.c
1083
#define XADC_CHAN_VOLTAGE(_chan, _scan_index, _addr, _bits, _ext, _alarm) { \
drivers/iio/adc/xilinx-xadc-core.c
1087
.address = (_addr), \
drivers/iio/adc/xilinx-xadc-core.c
1095
.sign = ((_addr) == XADC_REG_VREFN) ? 's' : 'u', \
drivers/iio/adc/xilinx-xadc-core.c
1105
#define XADC_7S_CHAN_TEMP(_chan, _scan_index, _addr) \
drivers/iio/adc/xilinx-xadc-core.c
1106
XADC_CHAN_TEMP(_chan, _scan_index, _addr, 12)
drivers/iio/adc/xilinx-xadc-core.c
1107
#define XADC_7S_CHAN_VOLTAGE(_chan, _scan_index, _addr, _ext, _alarm) \
drivers/iio/adc/xilinx-xadc-core.c
1108
XADC_CHAN_VOLTAGE(_chan, _scan_index, _addr, 12, _ext, _alarm)
drivers/iio/adc/xilinx-xadc-core.c
1140
#define XADC_US_CHAN_TEMP(_chan, _scan_index, _addr) \
drivers/iio/adc/xilinx-xadc-core.c
1141
XADC_CHAN_TEMP(_chan, _scan_index, _addr, 10)
drivers/iio/adc/xilinx-xadc-core.c
1142
#define XADC_US_CHAN_VOLTAGE(_chan, _scan_index, _addr, _ext, _alarm) \
drivers/iio/adc/xilinx-xadc-core.c
1143
XADC_CHAN_VOLTAGE(_chan, _scan_index, _addr, 10, _ext, _alarm)
drivers/iio/chemical/atlas-sensor.c
137
#define ATLAS_CONCENTRATION_CHANNEL(_idx, _addr) \
drivers/iio/chemical/atlas-sensor.c
142
.address = _addr, \
drivers/iio/chemical/pms7003.c
172
#define PMS7003_CHAN(_index, _mod, _addr) { \
drivers/iio/chemical/pms7003.c
176
.address = _addr, \
drivers/iio/dac/rohm-bd79703.c
87
#define BD79703_CHAN_ADDR(_chan, _addr) { \
drivers/iio/dac/rohm-bd79703.c
94
.address = (_addr), \
drivers/iio/light/as73211.c
129
#define AS73211_COLOR_CHANNEL(_color, _si, _addr) { \
drivers/iio/light/as73211.c
142
.address = _addr, \
drivers/iio/light/bh1745.c
196
#define BH1745_CHANNEL(_colour, _si, _addr) \
drivers/iio/light/bh1745.c
207
.channel2 = IIO_MOD_LIGHT_##_colour, .address = _addr, \
drivers/iio/light/cm3323.c
52
#define CM3323_COLOR_CHANNEL(_color, _addr) { \
drivers/iio/light/cm3323.c
58
.address = _addr, \
drivers/iio/light/ltr501.c
577
#define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
drivers/iio/light/ltr501.c
581
.address = (_addr), \
drivers/iio/light/tcs3414.c
58
#define TCS3414_CHANNEL(_color, _si, _addr) { \
drivers/iio/light/tcs3414.c
65
.address = _addr, \
drivers/iio/light/tcs3472.c
88
#define TCS3472_CHANNEL(_color, _si, _addr) { \
drivers/iio/light/tcs3472.c
95
.address = _addr, \
drivers/iio/light/veml3328.c
58
#define VEML3328_CHAN_SPEC(_color, _addr) { \
drivers/iio/light/veml3328.c
67
.address = _addr, \
drivers/iio/pressure/zpa2326_i2c.c
31
#define ZPA2326_SA0(_addr) (_addr & BIT(0))
drivers/input/misc/ims-pcu.c
1503
#define IMS_PCU_OFN_BIT_ATTR(_field, _addr, _nr) \
drivers/input/misc/ims-pcu.c
1507
.addr = _addr, \
drivers/iommu/mtk_iommu.c
313
dma_addr_t _addr = iova; \
drivers/iommu/mtk_iommu.c
314
((lower_32_bits(_addr) & GENMASK(31, 12)) | upper_32_bits(_addr));\
drivers/mfd/mt6360-core.c
77
#define I2C_ADDR_XLATE_8BIT(_addr, _rw) (((_addr & 0x7F) << 1) + _rw)
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
203
#define CL22_WR_OVER_CL45(_bp, _phy, _bank, _addr, _val) \
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
206
(_bank + (_addr & 0xf)), \
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
209
#define CL22_RD_OVER_CL45(_bp, _phy, _bank, _addr, _val) \
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
212
(_bank + (_addr & 0xf)), \
drivers/net/ethernet/brocade/bna/bna.h
29
#define BNA_SET_DMA_ADDR(_addr, _bna_dma_addr) \
drivers/net/ethernet/brocade/bna/bna.h
32
cpu_to_be64((u64)(_addr)); \
drivers/net/ethernet/brocade/bna/bna.h
41
#define BNA_GET_DMA_ADDR(_bna_dma_addr, _addr) \
drivers/net/ethernet/brocade/bna/bna.h
43
(_addr) = ((((u64)ntohl((_bna_dma_addr)->msb))) << 32) \
drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
1207
static int cxgb4vf_set_mac_addr(struct net_device *dev, void *_addr)
drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
1210
struct sockaddr *addr = _addr;
drivers/net/ethernet/fungible/funcore/fun_hci.h
1206
#define FUN_ADI_MAC_INIT(_addr) \
drivers/net/ethernet/fungible/funcore/fun_hci.h
1208
.addr = cpu_to_be64(_addr), \
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h
39
typeof(addr) _addr = (addr); \
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h
40
u32 _value = hbg_reg_read(_priv, _addr); \
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h
42
hbg_reg_write(_priv, _addr, _value); })
drivers/net/wireless/ath/ath9k/hw.h
86
#define REG_READ_MULTI(_ah, _addr, _val, _cnt) \
drivers/net/wireless/ath/ath9k/hw.h
87
(_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt))
drivers/net/wireless/realtek/rtw89/mac.h
587
#define ACCESS_CMAC(_addr) \
drivers/net/wireless/realtek/rtw89/mac.h
588
({typeof(_addr) __addr = (_addr); \
drivers/net/wireless/realtek/rtw89/phy.h
938
#define RTW89_DECL_RFK_WRF(_path, _addr, _mask, _data) \
drivers/net/wireless/realtek/rtw89/phy.h
941
.addr = _addr, \
drivers/net/wireless/realtek/rtw89/phy.h
945
#define RTW89_DECL_RFK_WM(_addr, _mask, _data) \
drivers/net/wireless/realtek/rtw89/phy.h
947
.addr = _addr, \
drivers/net/wireless/realtek/rtw89/phy.h
951
#define RTW89_DECL_RFK_WS(_addr, _mask) \
drivers/net/wireless/realtek/rtw89/phy.h
953
.addr = _addr, \
drivers/net/wireless/realtek/rtw89/phy.h
956
#define RTW89_DECL_RFK_WC(_addr, _mask) \
drivers/net/wireless/realtek/rtw89/phy.h
958
.addr = _addr, \
drivers/parisc/pdc_stable.c
102
#define PDCSPATH_ENTRY(_addr, _name) \
drivers/parisc/pdc_stable.c
105
.addr = _addr, \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
227
#define RZG2L_PCTRL_REG_ACCESS8(_read, _addr, _val) \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
230
_val = readb(_addr); \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
232
writeb(_val, _addr); \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
236
#define RZG2L_PCTRL_REG_ACCESS16(_read, _addr, _val) \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
239
_val = readw(_addr); \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
241
writew(_val, _addr); \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
245
#define RZG2L_PCTRL_REG_ACCESS32(_read, _addr, _val) \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
248
_val = readl(_addr); \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
250
writel(_val, _addr); \
drivers/power/supply/sbs-battery.c
87
#define SBS_DATA(_psp, _addr, _min_value, _max_value) { \
drivers/power/supply/sbs-battery.c
89
.addr = _addr, \
drivers/regulator/ab8500.c
1158
#define REG_INIT(_id, _bank, _addr, _mask) \
drivers/regulator/ab8500.c
1161
.addr = _addr, \
drivers/regulator/rt5133-regulator.c
95
#define I2C_ADDR_XLATE_8BIT(_addr, _rw) ((((_addr) & 0x7F) << 1) | (_rw))
drivers/soc/qcom/qcom-geni-se.c
282
#define geni_setbits32(_addr, _v) writel(readl(_addr) | (_v), _addr)
drivers/soc/qcom/qcom-geni-se.c
283
#define geni_clrbits32(_addr, _v) writel(readl(_addr) & ~(_v), _addr)
drivers/staging/iio/frequency/dds.h
101
#define IIO_DEV_ATTR_OUT_WAVETYPE(_channel, _output, _store, _addr) \
drivers/staging/iio/frequency/dds.h
103
0200, NULL, _store, _addr)
drivers/staging/iio/frequency/dds.h
14
#define IIO_DEV_ATTR_FREQ(_channel, _num, _mode, _show, _store, _addr) \
drivers/staging/iio/frequency/dds.h
16
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
29
#define IIO_DEV_ATTR_FREQSYMBOL(_channel, _mode, _show, _store, _addr) \
drivers/staging/iio/frequency/dds.h
31
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
37
#define IIO_DEV_ATTR_PHASE(_channel, _num, _mode, _show, _store, _addr) \
drivers/staging/iio/frequency/dds.h
39
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
52
#define IIO_DEV_ATTR_PHASESYMBOL(_channel, _mode, _show, _store, _addr) \
drivers/staging/iio/frequency/dds.h
54
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
60
#define IIO_DEV_ATTR_PINCONTROL_EN(_channel, _mode, _show, _store, _addr)\
drivers/staging/iio/frequency/dds.h
62
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
68
#define IIO_DEV_ATTR_PINCONTROL_FREQ_EN(_channel, _mode, _show, _store, _addr)\
drivers/staging/iio/frequency/dds.h
70
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
76
#define IIO_DEV_ATTR_PINCONTROL_PHASE_EN(_channel, _mode, _show, _store, _addr)\
drivers/staging/iio/frequency/dds.h
78
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
84
#define IIO_DEV_ATTR_OUT_ENABLE(_channel, _mode, _show, _store, _addr) \
drivers/staging/iio/frequency/dds.h
86
_mode, _show, _store, _addr)
drivers/staging/iio/frequency/dds.h
93
_mode, _show, _store, _addr) \
drivers/staging/iio/frequency/dds.h
95
_mode, _show, _store, _addr)
drivers/usb/gadget/udc/pxa27x_udc.h
263
#define PXA_EP_DEF(_idx, _addr, dir, _type, maxpkt, _config, iface, altset) \
drivers/usb/gadget/udc/pxa27x_udc.h
268
.dir_in = dir, .addr = _addr, \
include/linux/compat.h
214
compat_uptr_t _addr; /* faulting insn/memory ref. */
include/linux/coresight.h
138
#define CSDEV_ACCESS_IOMEM(_addr) \
include/linux/coresight.h
141
.base = (_addr), \
include/linux/iio/sysfs.h
54
#define IIO_ATTR(_name, _mode, _show, _store, _addr) \
include/linux/iio/sysfs.h
56
.address = _addr }
include/linux/iio/sysfs.h
58
#define IIO_ATTR_RO(_name, _addr) \
include/linux/iio/sysfs.h
60
.address = _addr }
include/linux/iio/sysfs.h
62
#define IIO_ATTR_WO(_name, _addr) \
include/linux/iio/sysfs.h
64
.address = _addr }
include/linux/iio/sysfs.h
66
#define IIO_ATTR_RW(_name, _addr) \
include/linux/iio/sysfs.h
68
.address = _addr }
include/linux/iio/sysfs.h
70
#define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \
include/linux/iio/sysfs.h
72
= IIO_ATTR(_name, _mode, _show, _store, _addr)
include/linux/iio/sysfs.h
74
#define IIO_DEVICE_ATTR_RO(_name, _addr) \
include/linux/iio/sysfs.h
76
= IIO_ATTR_RO(_name, _addr)
include/linux/iio/sysfs.h
78
#define IIO_DEVICE_ATTR_WO(_name, _addr) \
include/linux/iio/sysfs.h
80
= IIO_ATTR_WO(_name, _addr)
include/linux/iio/sysfs.h
82
#define IIO_DEVICE_ATTR_RW(_name, _addr) \
include/linux/iio/sysfs.h
84
= IIO_ATTR_RW(_name, _addr)
include/linux/iio/sysfs.h
86
#define IIO_DEVICE_ATTR_NAMED(_vname, _name, _mode, _show, _store, _addr) \
include/linux/iio/sysfs.h
88
= IIO_ATTR(_name, _mode, _show, _store, _addr)
include/soc/fsl/qe/qe.h
263
#define qe_setbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr))
include/soc/fsl/qe/qe.h
264
#define qe_clrbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
include/soc/fsl/qe/qe.h
266
#define qe_setbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr))
include/soc/fsl/qe/qe.h
267
#define qe_clrbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
include/soc/fsl/qe/qe.h
269
#define qe_setbits_8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr))
include/soc/fsl/qe/qe.h
270
#define qe_clrbits_8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
include/uapi/asm-generic/siginfo.h
155
#define si_addr _sifields._sigfault._addr
include/uapi/asm-generic/siginfo.h
70
void __user *_addr; /* faulting insn/memory ref. */
net/ipv6/netfilter/ip6t_rt.c
104
+ temp * sizeof(_addr),
net/ipv6/netfilter/ip6t_rt.c
105
sizeof(_addr),
net/ipv6/netfilter/ip6t_rt.c
106
&_addr);
net/ipv6/netfilter/ip6t_rt.c
131
+ temp * sizeof(_addr),
net/ipv6/netfilter/ip6t_rt.c
132
sizeof(_addr),
net/ipv6/netfilter/ip6t_rt.c
133
&_addr);
net/ipv6/netfilter/ip6t_rt.c
40
struct in6_addr _addr;
net/mac80211/sta_info.h
899
#define for_each_sta_info(local, _addr, _sta, _tmp) \
net/mac80211/sta_info.h
901
sta_info_hash_lookup(local, _addr), hash_node)
net/mac80211/sta_info.h
906
#define for_each_link_sta_info(local, _addr, _sta, _tmp) \
net/mac80211/sta_info.h
908
link_sta_info_hash_lookup(local, _addr), \
net/nfc/llcp_sock.c
653
static int llcp_sock_connect(struct socket *sock, struct sockaddr_unsized *_addr,
net/nfc/llcp_sock.c
658
struct sockaddr_nfc_llcp *addr = (struct sockaddr_nfc_llcp *)_addr;
net/nfc/rawsock.c
87
static int rawsock_connect(struct socket *sock, struct sockaddr_unsized *_addr,
net/nfc/rawsock.c
91
struct sockaddr_nfc *addr = (struct sockaddr_nfc *)_addr;
sound/soc/renesas/rcar/debugfs.c
41
void rsnd_debugfs_reg_show(struct seq_file *m, phys_addr_t _addr,
sound/soc/renesas/rcar/debugfs.c
47
phys_addr_t addr = _addr + offset + i;
sound/soc/renesas/rcar/rsnd.h
949
void rsnd_debugfs_reg_show(struct seq_file *m, phys_addr_t _addr,
tools/perf/util/probe-finder.c
1621
Dwarf_Addr _addr = 0, baseaddr = 0;
tools/perf/util/probe-finder.c
1675
if (die_entrypc(&indie, &_addr) == 0 &&
tools/perf/util/probe-finder.c
1676
_addr == addr) {
tools/testing/selftests/kvm/s390/memop.c
405
uintptr_t _addr, abs, i;
tools/testing/selftests/kvm/s390/memop.c
408
_addr = (uintptr_t)addr;
tools/testing/selftests/kvm/s390/memop.c
409
for (i = _addr & PAGE_MASK; i < _addr + len; i += PAGE_SIZE) {