access_ereg
rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, bank, offset, val);
rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, bank, offset, new);
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
return access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
ret = access_ereg(phydev, cmd_seq[i].mode,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
irq_status = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
rc = access_ereg(phydev, cable_test[i].mode,
gain_idx = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
pos_peak = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
neg_peak = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
pos_peak_time = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
neg_peak_time = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_DSP,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,